xref: /openbmc/u-boot/arch/arm/include/asm/io.h (revision d4562e09)
1 /*
2  *  linux/include/asm-arm/io.h
3  *
4  *  Copyright (C) 1996-2000 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Modifications:
11  *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
12  *			constant addresses and variable addresses.
13  *  04-Dec-1997	RMK	Moved a lot of this stuff to the new architecture
14  *			specific IO header files.
15  *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
16  *  04-Apr-1999	PJB	Added check_signature.
17  *  12-Dec-1999	RMK	More cleanups
18  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
19  */
20 #ifndef __ASM_ARM_IO_H
21 #define __ASM_ARM_IO_H
22 
23 #ifdef __KERNEL__
24 
25 #include <linux/types.h>
26 #include <asm/byteorder.h>
27 #include <asm/memory.h>
28 #if 0	/* XXX###XXX */
29 #include <asm/arch/hardware.h>
30 #endif	/* XXX###XXX */
31 
32 static inline void sync(void)
33 {
34 }
35 
36 /*
37  * Given a physical address and a length, return a virtual address
38  * that can be used to access the memory range with the caching
39  * properties specified by "flags".
40  */
41 #define MAP_NOCACHE	(0)
42 #define MAP_WRCOMBINE	(0)
43 #define MAP_WRBACK	(0)
44 #define MAP_WRTHROUGH	(0)
45 
46 static inline void *
47 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
48 {
49 	return (void *)paddr;
50 }
51 
52 /*
53  * Take down a mapping set up by map_physmem().
54  */
55 static inline void unmap_physmem(void *vaddr, unsigned long flags)
56 {
57 
58 }
59 
60 static inline phys_addr_t virt_to_phys(void * vaddr)
61 {
62 	return (phys_addr_t)(vaddr);
63 }
64 
65 /*
66  * Generic virtual read/write.  Note that we don't support half-word
67  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
68  * to the architecture specific code.
69  */
70 #define __arch_getb(a)			(*(volatile unsigned char *)(a))
71 #define __arch_getw(a)			(*(volatile unsigned short *)(a))
72 #define __arch_getl(a)			(*(volatile unsigned int *)(a))
73 
74 #define __arch_putb(v,a)		(*(volatile unsigned char *)(a) = (v))
75 #define __arch_putw(v,a)		(*(volatile unsigned short *)(a) = (v))
76 #define __arch_putl(v,a)		(*(volatile unsigned int *)(a) = (v))
77 
78 extern inline void __raw_writesb(unsigned int addr, const void *data, int bytelen)
79 {
80 	uint8_t *buf = (uint8_t *)data;
81 	while(bytelen--)
82 		__arch_putb(*buf++, addr);
83 }
84 
85 extern inline void __raw_writesw(unsigned int addr, const void *data, int wordlen)
86 {
87 	uint16_t *buf = (uint16_t *)data;
88 	while(wordlen--)
89 		__arch_putw(*buf++, addr);
90 }
91 
92 extern inline void __raw_writesl(unsigned int addr, const void *data, int longlen)
93 {
94 	uint32_t *buf = (uint32_t *)data;
95 	while(longlen--)
96 		__arch_putl(*buf++, addr);
97 }
98 
99 extern inline void __raw_readsb(unsigned int addr, void *data, int bytelen)
100 {
101 	uint8_t *buf = (uint8_t *)data;
102 	while(bytelen--)
103 		*buf++ = __arch_getb(addr);
104 }
105 
106 extern inline void __raw_readsw(unsigned int addr, void *data, int wordlen)
107 {
108 	uint16_t *buf = (uint16_t *)data;
109 	while(wordlen--)
110 		*buf++ = __arch_getw(addr);
111 }
112 
113 extern inline void __raw_readsl(unsigned int addr, void *data, int longlen)
114 {
115 	uint32_t *buf = (uint32_t *)data;
116 	while(longlen--)
117 		*buf++ = __arch_getl(addr);
118 }
119 
120 #define __raw_writeb(v,a)		__arch_putb(v,a)
121 #define __raw_writew(v,a)		__arch_putw(v,a)
122 #define __raw_writel(v,a)		__arch_putl(v,a)
123 
124 #define __raw_readb(a)			__arch_getb(a)
125 #define __raw_readw(a)			__arch_getw(a)
126 #define __raw_readl(a)			__arch_getl(a)
127 
128 #define writeb(v,a)			__arch_putb(v,a)
129 #define writew(v,a)			__arch_putw(v,a)
130 #define writel(v,a)			__arch_putl(v,a)
131 
132 #define readb(a)			__arch_getb(a)
133 #define readw(a)			__arch_getw(a)
134 #define readl(a)			__arch_getl(a)
135 
136 /*
137  * The compiler seems to be incapable of optimising constants
138  * properly.  Spell it out to the compiler in some cases.
139  * These are only valid for small values of "off" (< 1<<12)
140  */
141 #define __raw_base_writeb(val,base,off)	__arch_base_putb(val,base,off)
142 #define __raw_base_writew(val,base,off)	__arch_base_putw(val,base,off)
143 #define __raw_base_writel(val,base,off)	__arch_base_putl(val,base,off)
144 
145 #define __raw_base_readb(base,off)	__arch_base_getb(base,off)
146 #define __raw_base_readw(base,off)	__arch_base_getw(base,off)
147 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
148 
149 /*
150  * Clear and set bits in one shot. These macros can be used to clear and
151  * set multiple bits in a register using a single call. These macros can
152  * also be used to set a multiple-bit bit pattern using a mask, by
153  * specifying the mask in the 'clear' parameter and the new bit pattern
154  * in the 'set' parameter.
155  */
156 
157 #define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
158 #define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
159 
160 #define out_le32(a,v)	out_arch(l,le32,a,v)
161 #define out_le16(a,v)	out_arch(w,le16,a,v)
162 
163 #define in_le32(a)	in_arch(l,le32,a)
164 #define in_le16(a)	in_arch(w,le16,a)
165 
166 #define out_be32(a,v)	out_arch(l,be32,a,v)
167 #define out_be16(a,v)	out_arch(w,be16,a,v)
168 
169 #define in_be32(a)	in_arch(l,be32,a)
170 #define in_be16(a)	in_arch(w,be16,a)
171 
172 #define out_8(a,v)	__raw_writeb(v,a)
173 #define in_8(a)		__raw_readb(a)
174 
175 #define clrbits(type, addr, clear) \
176 	out_##type((addr), in_##type(addr) & ~(clear))
177 
178 #define setbits(type, addr, set) \
179 	out_##type((addr), in_##type(addr) | (set))
180 
181 #define clrsetbits(type, addr, clear, set) \
182 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
183 
184 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
185 #define setbits_be32(addr, set) setbits(be32, addr, set)
186 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
187 
188 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
189 #define setbits_le32(addr, set) setbits(le32, addr, set)
190 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
191 
192 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
193 #define setbits_be16(addr, set) setbits(be16, addr, set)
194 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
195 
196 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
197 #define setbits_le16(addr, set) setbits(le16, addr, set)
198 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
199 
200 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
201 #define setbits_8(addr, set) setbits(8, addr, set)
202 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
203 
204 /*
205  * Now, pick up the machine-defined IO definitions
206  */
207 #if 0	/* XXX###XXX */
208 #include <asm/arch/io.h>
209 #endif	/* XXX###XXX */
210 
211 /*
212  *  IO port access primitives
213  *  -------------------------
214  *
215  * The ARM doesn't have special IO access instructions; all IO is memory
216  * mapped.  Note that these are defined to perform little endian accesses
217  * only.  Their primary purpose is to access PCI and ISA peripherals.
218  *
219  * Note that for a big endian machine, this implies that the following
220  * big endian mode connectivity is in place, as described by numerous
221  * ARM documents:
222  *
223  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
224  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
225  *
226  * The machine specific io.h include defines __io to translate an "IO"
227  * address to a memory address.
228  *
229  * Note that we prevent GCC re-ordering or caching values in expressions
230  * by introducing sequence points into the in*() definitions.  Note that
231  * __raw_* do not guarantee this behaviour.
232  *
233  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
234  */
235 #ifdef __io
236 #define outb(v,p)			__raw_writeb(v,__io(p))
237 #define outw(v,p)			__raw_writew(cpu_to_le16(v),__io(p))
238 #define outl(v,p)			__raw_writel(cpu_to_le32(v),__io(p))
239 
240 #define inb(p)	({ unsigned int __v = __raw_readb(__io(p)); __v; })
241 #define inw(p)	({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
242 #define inl(p)	({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
243 
244 #define outsb(p,d,l)			__raw_writesb(__io(p),d,l)
245 #define outsw(p,d,l)			__raw_writesw(__io(p),d,l)
246 #define outsl(p,d,l)			__raw_writesl(__io(p),d,l)
247 
248 #define insb(p,d,l)			__raw_readsb(__io(p),d,l)
249 #define insw(p,d,l)			__raw_readsw(__io(p),d,l)
250 #define insl(p,d,l)			__raw_readsl(__io(p),d,l)
251 #endif
252 
253 #define outb_p(val,port)		outb((val),(port))
254 #define outw_p(val,port)		outw((val),(port))
255 #define outl_p(val,port)		outl((val),(port))
256 #define inb_p(port)			inb((port))
257 #define inw_p(port)			inw((port))
258 #define inl_p(port)			inl((port))
259 
260 #define outsb_p(port,from,len)		outsb(port,from,len)
261 #define outsw_p(port,from,len)		outsw(port,from,len)
262 #define outsl_p(port,from,len)		outsl(port,from,len)
263 #define insb_p(port,to,len)		insb(port,to,len)
264 #define insw_p(port,to,len)		insw(port,to,len)
265 #define insl_p(port,to,len)		insl(port,to,len)
266 
267 /*
268  * ioremap and friends.
269  *
270  * ioremap takes a PCI memory address, as specified in
271  * linux/Documentation/IO-mapping.txt.  If you want a
272  * physical address, use __ioremap instead.
273  */
274 extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
275 extern void __iounmap(void *addr);
276 
277 /*
278  * Generic ioremap support.
279  *
280  * Define:
281  *  iomem_valid_addr(off,size)
282  *  iomem_to_phys(off)
283  */
284 #ifdef iomem_valid_addr
285 #define __arch_ioremap(off,sz,nocache)					\
286  ({									\
287 	unsigned long _off = (off), _size = (sz);			\
288 	void *_ret = (void *)0;						\
289 	if (iomem_valid_addr(_off, _size))				\
290 		_ret = __ioremap(iomem_to_phys(_off),_size,nocache);	\
291 	_ret;								\
292  })
293 
294 #define __arch_iounmap __iounmap
295 #endif
296 
297 #define ioremap(off,sz)			__arch_ioremap((off),(sz),0)
298 #define ioremap_nocache(off,sz)		__arch_ioremap((off),(sz),1)
299 #define iounmap(_addr)			__arch_iounmap(_addr)
300 
301 /*
302  * DMA-consistent mapping functions.  These allocate/free a region of
303  * uncached, unwrite-buffered mapped memory space for use with DMA
304  * devices.  This is the "generic" version.  The PCI specific version
305  * is in pci.h
306  */
307 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
308 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
309 extern void consistent_sync(void *vaddr, size_t size, int rw);
310 
311 /*
312  * String version of IO memory access ops:
313  */
314 extern void _memcpy_fromio(void *, unsigned long, size_t);
315 extern void _memcpy_toio(unsigned long, const void *, size_t);
316 extern void _memset_io(unsigned long, int, size_t);
317 
318 extern void __readwrite_bug(const char *fn);
319 
320 /*
321  * If this architecture has PCI memory IO, then define the read/write
322  * macros.  These should only be used with the cookie passed from
323  * ioremap.
324  */
325 #ifdef __mem_pci
326 
327 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
328 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
329 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
330 
331 #define writeb(v,c)		__raw_writeb(v,__mem_pci(c))
332 #define writew(v,c)		__raw_writew(cpu_to_le16(v),__mem_pci(c))
333 #define writel(v,c)		__raw_writel(cpu_to_le32(v),__mem_pci(c))
334 
335 #define memset_io(c,v,l)		_memset_io(__mem_pci(c),(v),(l))
336 #define memcpy_fromio(a,c,l)		_memcpy_fromio((a),__mem_pci(c),(l))
337 #define memcpy_toio(c,a,l)		_memcpy_toio(__mem_pci(c),(a),(l))
338 
339 #define eth_io_copy_and_sum(s,c,l,b) \
340 				eth_copy_and_sum((s),__mem_pci(c),(l),(b))
341 
342 static inline int
343 check_signature(unsigned long io_addr, const unsigned char *signature,
344 		int length)
345 {
346 	int retval = 0;
347 	do {
348 		if (readb(io_addr) != *signature)
349 			goto out;
350 		io_addr++;
351 		signature++;
352 		length--;
353 	} while (length);
354 	retval = 1;
355 out:
356 	return retval;
357 }
358 
359 #elif !defined(readb)
360 
361 #define readb(addr)			(__readwrite_bug("readb"),0)
362 #define readw(addr)			(__readwrite_bug("readw"),0)
363 #define readl(addr)			(__readwrite_bug("readl"),0)
364 #define writeb(v,addr)			__readwrite_bug("writeb")
365 #define writew(v,addr)			__readwrite_bug("writew")
366 #define writel(v,addr)			__readwrite_bug("writel")
367 
368 #define eth_io_copy_and_sum(a,b,c,d)	__readwrite_bug("eth_io_copy_and_sum")
369 
370 #define check_signature(io,sig,len)	(0)
371 
372 #endif	/* __mem_pci */
373 
374 /*
375  * If this architecture has ISA IO, then define the isa_read/isa_write
376  * macros.
377  */
378 #ifdef __mem_isa
379 
380 #define isa_readb(addr)			__raw_readb(__mem_isa(addr))
381 #define isa_readw(addr)			__raw_readw(__mem_isa(addr))
382 #define isa_readl(addr)			__raw_readl(__mem_isa(addr))
383 #define isa_writeb(val,addr)		__raw_writeb(val,__mem_isa(addr))
384 #define isa_writew(val,addr)		__raw_writew(val,__mem_isa(addr))
385 #define isa_writel(val,addr)		__raw_writel(val,__mem_isa(addr))
386 #define isa_memset_io(a,b,c)		_memset_io(__mem_isa(a),(b),(c))
387 #define isa_memcpy_fromio(a,b,c)	_memcpy_fromio((a),__mem_isa(b),(c))
388 #define isa_memcpy_toio(a,b,c)		_memcpy_toio(__mem_isa((a)),(b),(c))
389 
390 #define isa_eth_io_copy_and_sum(a,b,c,d) \
391 				eth_copy_and_sum((a),__mem_isa(b),(c),(d))
392 
393 static inline int
394 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
395 		    int length)
396 {
397 	int retval = 0;
398 	do {
399 		if (isa_readb(io_addr) != *signature)
400 			goto out;
401 		io_addr++;
402 		signature++;
403 		length--;
404 	} while (length);
405 	retval = 1;
406 out:
407 	return retval;
408 }
409 
410 #else	/* __mem_isa */
411 
412 #define isa_readb(addr)			(__readwrite_bug("isa_readb"),0)
413 #define isa_readw(addr)			(__readwrite_bug("isa_readw"),0)
414 #define isa_readl(addr)			(__readwrite_bug("isa_readl"),0)
415 #define isa_writeb(val,addr)		__readwrite_bug("isa_writeb")
416 #define isa_writew(val,addr)		__readwrite_bug("isa_writew")
417 #define isa_writel(val,addr)		__readwrite_bug("isa_writel")
418 #define isa_memset_io(a,b,c)		__readwrite_bug("isa_memset_io")
419 #define isa_memcpy_fromio(a,b,c)	__readwrite_bug("isa_memcpy_fromio")
420 #define isa_memcpy_toio(a,b,c)		__readwrite_bug("isa_memcpy_toio")
421 
422 #define isa_eth_io_copy_and_sum(a,b,c,d) \
423 				__readwrite_bug("isa_eth_io_copy_and_sum")
424 
425 #define isa_check_signature(io,sig,len)	(0)
426 
427 #endif	/* __mem_isa */
428 #endif	/* __KERNEL__ */
429 #endif	/* __ASM_ARM_IO_H */
430