xref: /openbmc/u-boot/arch/arm/include/asm/io.h (revision 8ee59472)
1 /*
2  *  linux/include/asm-arm/io.h
3  *
4  *  Copyright (C) 1996-2000 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Modifications:
11  *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
12  *			constant addresses and variable addresses.
13  *  04-Dec-1997	RMK	Moved a lot of this stuff to the new architecture
14  *			specific IO header files.
15  *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
16  *  04-Apr-1999	PJB	Added check_signature.
17  *  12-Dec-1999	RMK	More cleanups
18  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
19  */
20 #ifndef __ASM_ARM_IO_H
21 #define __ASM_ARM_IO_H
22 
23 #ifdef __KERNEL__
24 
25 #include <linux/types.h>
26 #include <asm/byteorder.h>
27 #include <asm/memory.h>
28 #include <asm/barriers.h>
29 #if 0	/* XXX###XXX */
30 #include <asm/arch/hardware.h>
31 #endif	/* XXX###XXX */
32 
33 static inline void sync(void)
34 {
35 }
36 
37 /*
38  * Generic virtual read/write.  Note that we don't support half-word
39  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
40  * to the architecture specific code.
41  */
42 #define __arch_getb(a)			(*(volatile unsigned char *)(a))
43 #define __arch_getw(a)			(*(volatile unsigned short *)(a))
44 #define __arch_getl(a)			(*(volatile unsigned int *)(a))
45 #define __arch_getq(a)			(*(volatile unsigned long long *)(a))
46 
47 #define __arch_putb(v,a)		(*(volatile unsigned char *)(a) = (v))
48 #define __arch_putw(v,a)		(*(volatile unsigned short *)(a) = (v))
49 #define __arch_putl(v,a)		(*(volatile unsigned int *)(a) = (v))
50 #define __arch_putq(v,a)		(*(volatile unsigned long long *)(a) = (v))
51 
52 static inline void __raw_writesb(unsigned long addr, const void *data,
53 				 int bytelen)
54 {
55 	uint8_t *buf = (uint8_t *)data;
56 	while(bytelen--)
57 		__arch_putb(*buf++, addr);
58 }
59 
60 static inline void __raw_writesw(unsigned long addr, const void *data,
61 				 int wordlen)
62 {
63 	uint16_t *buf = (uint16_t *)data;
64 	while(wordlen--)
65 		__arch_putw(*buf++, addr);
66 }
67 
68 static inline void __raw_writesl(unsigned long addr, const void *data,
69 				 int longlen)
70 {
71 	uint32_t *buf = (uint32_t *)data;
72 	while(longlen--)
73 		__arch_putl(*buf++, addr);
74 }
75 
76 static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
77 {
78 	uint8_t *buf = (uint8_t *)data;
79 	while(bytelen--)
80 		*buf++ = __arch_getb(addr);
81 }
82 
83 static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
84 {
85 	uint16_t *buf = (uint16_t *)data;
86 	while(wordlen--)
87 		*buf++ = __arch_getw(addr);
88 }
89 
90 static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
91 {
92 	uint32_t *buf = (uint32_t *)data;
93 	while(longlen--)
94 		*buf++ = __arch_getl(addr);
95 }
96 
97 #define __raw_writeb(v,a)	__arch_putb(v,a)
98 #define __raw_writew(v,a)	__arch_putw(v,a)
99 #define __raw_writel(v,a)	__arch_putl(v,a)
100 #define __raw_writeq(v,a)	__arch_putq(v,a)
101 
102 #define __raw_readb(a)		__arch_getb(a)
103 #define __raw_readw(a)		__arch_getw(a)
104 #define __raw_readl(a)		__arch_getl(a)
105 #define __raw_readq(a)		__arch_getq(a)
106 
107 /*
108  * TODO: The kernel offers some more advanced versions of barriers, it might
109  * have some advantages to use them instead of the simple one here.
110  */
111 #define mb()		dsb()
112 #define __iormb()	dmb()
113 #define __iowmb()	dmb()
114 
115 #define writeb(v,c)	({ u8  __v = v; __iowmb(); __arch_putb(__v,c); __v; })
116 #define writew(v,c)	({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
117 #define writel(v,c)	({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
118 #define writeq(v,c)	({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
119 
120 #define readb(c)	({ u8  __v = __arch_getb(c); __iormb(); __v; })
121 #define readw(c)	({ u16 __v = __arch_getw(c); __iormb(); __v; })
122 #define readl(c)	({ u32 __v = __arch_getl(c); __iormb(); __v; })
123 #define readq(c)	({ u64 __v = __arch_getq(c); __iormb(); __v; })
124 
125 /*
126  * The compiler seems to be incapable of optimising constants
127  * properly.  Spell it out to the compiler in some cases.
128  * These are only valid for small values of "off" (< 1<<12)
129  */
130 #define __raw_base_writeb(val,base,off)	__arch_base_putb(val,base,off)
131 #define __raw_base_writew(val,base,off)	__arch_base_putw(val,base,off)
132 #define __raw_base_writel(val,base,off)	__arch_base_putl(val,base,off)
133 
134 #define __raw_base_readb(base,off)	__arch_base_getb(base,off)
135 #define __raw_base_readw(base,off)	__arch_base_getw(base,off)
136 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
137 
138 /*
139  * Clear and set bits in one shot. These macros can be used to clear and
140  * set multiple bits in a register using a single call. These macros can
141  * also be used to set a multiple-bit bit pattern using a mask, by
142  * specifying the mask in the 'clear' parameter and the new bit pattern
143  * in the 'set' parameter.
144  */
145 
146 #define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
147 #define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
148 
149 #define out_le64(a,v)	out_arch(q,le64,a,v)
150 #define out_le32(a,v)	out_arch(l,le32,a,v)
151 #define out_le16(a,v)	out_arch(w,le16,a,v)
152 
153 #define in_le64(a)	in_arch(q,le64,a)
154 #define in_le32(a)	in_arch(l,le32,a)
155 #define in_le16(a)	in_arch(w,le16,a)
156 
157 #define out_be32(a,v)	out_arch(l,be32,a,v)
158 #define out_be16(a,v)	out_arch(w,be16,a,v)
159 
160 #define in_be32(a)	in_arch(l,be32,a)
161 #define in_be16(a)	in_arch(w,be16,a)
162 
163 #define out_8(a,v)	__raw_writeb(v,a)
164 #define in_8(a)		__raw_readb(a)
165 
166 #define clrbits(type, addr, clear) \
167 	out_##type((addr), in_##type(addr) & ~(clear))
168 
169 #define setbits(type, addr, set) \
170 	out_##type((addr), in_##type(addr) | (set))
171 
172 #define clrsetbits(type, addr, clear, set) \
173 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
174 
175 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
176 #define setbits_be32(addr, set) setbits(be32, addr, set)
177 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
178 
179 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
180 #define setbits_le32(addr, set) setbits(le32, addr, set)
181 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
182 
183 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
184 #define setbits_be16(addr, set) setbits(be16, addr, set)
185 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
186 
187 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
188 #define setbits_le16(addr, set) setbits(le16, addr, set)
189 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
190 
191 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
192 #define setbits_8(addr, set) setbits(8, addr, set)
193 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
194 
195 /*
196  * Now, pick up the machine-defined IO definitions
197  */
198 #if 0	/* XXX###XXX */
199 #include <asm/arch/io.h>
200 #endif	/* XXX###XXX */
201 
202 /*
203  *  IO port access primitives
204  *  -------------------------
205  *
206  * The ARM doesn't have special IO access instructions; all IO is memory
207  * mapped.  Note that these are defined to perform little endian accesses
208  * only.  Their primary purpose is to access PCI and ISA peripherals.
209  *
210  * Note that for a big endian machine, this implies that the following
211  * big endian mode connectivity is in place, as described by numerous
212  * ARM documents:
213  *
214  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
215  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
216  *
217  * The machine specific io.h include defines __io to translate an "IO"
218  * address to a memory address.
219  *
220  * Note that we prevent GCC re-ordering or caching values in expressions
221  * by introducing sequence points into the in*() definitions.  Note that
222  * __raw_* do not guarantee this behaviour.
223  *
224  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
225  */
226 #ifdef __io
227 #define outb(v,p)			__raw_writeb(v,__io(p))
228 #define outw(v,p)			__raw_writew(cpu_to_le16(v),__io(p))
229 #define outl(v,p)			__raw_writel(cpu_to_le32(v),__io(p))
230 
231 #define inb(p)	({ unsigned int __v = __raw_readb(__io(p)); __v; })
232 #define inw(p)	({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
233 #define inl(p)	({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
234 
235 #define outsb(p,d,l)			__raw_writesb(__io(p),d,l)
236 #define outsw(p,d,l)			__raw_writesw(__io(p),d,l)
237 #define outsl(p,d,l)			__raw_writesl(__io(p),d,l)
238 
239 #define insb(p,d,l)			__raw_readsb(__io(p),d,l)
240 #define insw(p,d,l)			__raw_readsw(__io(p),d,l)
241 #define insl(p,d,l)			__raw_readsl(__io(p),d,l)
242 #endif
243 
244 #define outb_p(val,port)		outb((val),(port))
245 #define outw_p(val,port)		outw((val),(port))
246 #define outl_p(val,port)		outl((val),(port))
247 #define inb_p(port)			inb((port))
248 #define inw_p(port)			inw((port))
249 #define inl_p(port)			inl((port))
250 
251 #define outsb_p(port,from,len)		outsb(port,from,len)
252 #define outsw_p(port,from,len)		outsw(port,from,len)
253 #define outsl_p(port,from,len)		outsl(port,from,len)
254 #define insb_p(port,to,len)		insb(port,to,len)
255 #define insw_p(port,to,len)		insw(port,to,len)
256 #define insl_p(port,to,len)		insl(port,to,len)
257 
258 #define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
259 #define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
260 #define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
261 #define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
262 #define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
263 #define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
264 
265 /*
266  * DMA-consistent mapping functions.  These allocate/free a region of
267  * uncached, unwrite-buffered mapped memory space for use with DMA
268  * devices.  This is the "generic" version.  The PCI specific version
269  * is in pci.h
270  */
271 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
272 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
273 extern void consistent_sync(void *vaddr, size_t size, int rw);
274 
275 /*
276  * String version of IO memory access ops:
277  */
278 extern void _memcpy_fromio(void *, unsigned long, size_t);
279 extern void _memcpy_toio(unsigned long, const void *, size_t);
280 extern void _memset_io(unsigned long, int, size_t);
281 
282 extern void __readwrite_bug(const char *fn);
283 
284 /*
285  * If this architecture has PCI memory IO, then define the read/write
286  * macros.  These should only be used with the cookie passed from
287  * ioremap.
288  */
289 #ifdef __mem_pci
290 
291 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
292 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
293 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
294 
295 #define writeb(v,c)		__raw_writeb(v,__mem_pci(c))
296 #define writew(v,c)		__raw_writew(cpu_to_le16(v),__mem_pci(c))
297 #define writel(v,c)		__raw_writel(cpu_to_le32(v),__mem_pci(c))
298 
299 #define memset_io(c,v,l)		_memset_io(__mem_pci(c),(v),(l))
300 #define memcpy_fromio(a,c,l)		_memcpy_fromio((a),__mem_pci(c),(l))
301 #define memcpy_toio(c,a,l)		_memcpy_toio(__mem_pci(c),(a),(l))
302 
303 #define eth_io_copy_and_sum(s,c,l,b) \
304 				eth_copy_and_sum((s),__mem_pci(c),(l),(b))
305 
306 static inline int
307 check_signature(unsigned long io_addr, const unsigned char *signature,
308 		int length)
309 {
310 	int retval = 0;
311 	do {
312 		if (readb(io_addr) != *signature)
313 			goto out;
314 		io_addr++;
315 		signature++;
316 		length--;
317 	} while (length);
318 	retval = 1;
319 out:
320 	return retval;
321 }
322 
323 #else
324 #define memset_io(a, b, c)		memset((void *)(a), (b), (c))
325 #define memcpy_fromio(a, b, c)		memcpy((a), (void *)(b), (c))
326 #define memcpy_toio(a, b, c)		memcpy((void *)(a), (b), (c))
327 
328 #if !defined(readb)
329 
330 #define readb(addr)			(__readwrite_bug("readb"),0)
331 #define readw(addr)			(__readwrite_bug("readw"),0)
332 #define readl(addr)			(__readwrite_bug("readl"),0)
333 #define writeb(v,addr)			__readwrite_bug("writeb")
334 #define writew(v,addr)			__readwrite_bug("writew")
335 #define writel(v,addr)			__readwrite_bug("writel")
336 
337 #define eth_io_copy_and_sum(a,b,c,d)	__readwrite_bug("eth_io_copy_and_sum")
338 
339 #define check_signature(io,sig,len)	(0)
340 
341 #endif
342 #endif	/* __mem_pci */
343 
344 /*
345  * If this architecture has ISA IO, then define the isa_read/isa_write
346  * macros.
347  */
348 #ifdef __mem_isa
349 
350 #define isa_readb(addr)			__raw_readb(__mem_isa(addr))
351 #define isa_readw(addr)			__raw_readw(__mem_isa(addr))
352 #define isa_readl(addr)			__raw_readl(__mem_isa(addr))
353 #define isa_writeb(val,addr)		__raw_writeb(val,__mem_isa(addr))
354 #define isa_writew(val,addr)		__raw_writew(val,__mem_isa(addr))
355 #define isa_writel(val,addr)		__raw_writel(val,__mem_isa(addr))
356 #define isa_memset_io(a,b,c)		_memset_io(__mem_isa(a),(b),(c))
357 #define isa_memcpy_fromio(a,b,c)	_memcpy_fromio((a),__mem_isa(b),(c))
358 #define isa_memcpy_toio(a,b,c)		_memcpy_toio(__mem_isa((a)),(b),(c))
359 
360 #define isa_eth_io_copy_and_sum(a,b,c,d) \
361 				eth_copy_and_sum((a),__mem_isa(b),(c),(d))
362 
363 static inline int
364 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
365 		    int length)
366 {
367 	int retval = 0;
368 	do {
369 		if (isa_readb(io_addr) != *signature)
370 			goto out;
371 		io_addr++;
372 		signature++;
373 		length--;
374 	} while (length);
375 	retval = 1;
376 out:
377 	return retval;
378 }
379 
380 #else	/* __mem_isa */
381 
382 #define isa_readb(addr)			(__readwrite_bug("isa_readb"),0)
383 #define isa_readw(addr)			(__readwrite_bug("isa_readw"),0)
384 #define isa_readl(addr)			(__readwrite_bug("isa_readl"),0)
385 #define isa_writeb(val,addr)		__readwrite_bug("isa_writeb")
386 #define isa_writew(val,addr)		__readwrite_bug("isa_writew")
387 #define isa_writel(val,addr)		__readwrite_bug("isa_writel")
388 #define isa_memset_io(a,b,c)		__readwrite_bug("isa_memset_io")
389 #define isa_memcpy_fromio(a,b,c)	__readwrite_bug("isa_memcpy_fromio")
390 #define isa_memcpy_toio(a,b,c)		__readwrite_bug("isa_memcpy_toio")
391 
392 #define isa_eth_io_copy_and_sum(a,b,c,d) \
393 				__readwrite_bug("isa_eth_io_copy_and_sum")
394 
395 #define isa_check_signature(io,sig,len)	(0)
396 
397 #endif	/* __mem_isa */
398 #endif	/* __KERNEL__ */
399 
400 #include <asm-generic/io.h>
401 #include <iotrace.h>
402 
403 #endif	/* __ASM_ARM_IO_H */
404