1 /* 2 * linux/include/asm-arm/io.h 3 * 4 * Copyright (C) 1996-2000 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Modifications: 11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 12 * constant addresses and variable addresses. 13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 14 * specific IO header files. 15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 16 * 04-Apr-1999 PJB Added check_signature. 17 * 12-Dec-1999 RMK More cleanups 18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 19 */ 20 #ifndef __ASM_ARM_IO_H 21 #define __ASM_ARM_IO_H 22 23 #ifdef __KERNEL__ 24 25 #include <linux/types.h> 26 #include <asm/byteorder.h> 27 #include <asm/memory.h> 28 #include <asm/barriers.h> 29 #if 0 /* XXX###XXX */ 30 #include <asm/arch/hardware.h> 31 #endif /* XXX###XXX */ 32 33 static inline void sync(void) 34 { 35 } 36 37 /* 38 * Generic virtual read/write. Note that we don't support half-word 39 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 40 * to the architecture specific code. 41 */ 42 #define __arch_getb(a) (*(volatile unsigned char *)(a)) 43 #define __arch_getw(a) (*(volatile unsigned short *)(a)) 44 #define __arch_getl(a) (*(volatile unsigned int *)(a)) 45 #define __arch_getq(a) (*(volatile unsigned long long *)(a)) 46 47 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) 48 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) 49 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) 50 #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v)) 51 52 static inline void __raw_writesb(unsigned long addr, const void *data, 53 int bytelen) 54 { 55 uint8_t *buf = (uint8_t *)data; 56 while(bytelen--) 57 __arch_putb(*buf++, addr); 58 } 59 60 static inline void __raw_writesw(unsigned long addr, const void *data, 61 int wordlen) 62 { 63 uint16_t *buf = (uint16_t *)data; 64 while(wordlen--) 65 __arch_putw(*buf++, addr); 66 } 67 68 static inline void __raw_writesl(unsigned long addr, const void *data, 69 int longlen) 70 { 71 uint32_t *buf = (uint32_t *)data; 72 while(longlen--) 73 __arch_putl(*buf++, addr); 74 } 75 76 static inline void __raw_readsb(unsigned long addr, void *data, int bytelen) 77 { 78 uint8_t *buf = (uint8_t *)data; 79 while(bytelen--) 80 *buf++ = __arch_getb(addr); 81 } 82 83 static inline void __raw_readsw(unsigned long addr, void *data, int wordlen) 84 { 85 uint16_t *buf = (uint16_t *)data; 86 while(wordlen--) 87 *buf++ = __arch_getw(addr); 88 } 89 90 static inline void __raw_readsl(unsigned long addr, void *data, int longlen) 91 { 92 uint32_t *buf = (uint32_t *)data; 93 while(longlen--) 94 *buf++ = __arch_getl(addr); 95 } 96 97 #define __raw_writeb(v,a) __arch_putb(v,a) 98 #define __raw_writew(v,a) __arch_putw(v,a) 99 #define __raw_writel(v,a) __arch_putl(v,a) 100 #define __raw_writeq(v,a) __arch_putq(v,a) 101 102 #define __raw_readb(a) __arch_getb(a) 103 #define __raw_readw(a) __arch_getw(a) 104 #define __raw_readl(a) __arch_getl(a) 105 #define __raw_readq(a) __arch_getq(a) 106 107 /* 108 * TODO: The kernel offers some more advanced versions of barriers, it might 109 * have some advantages to use them instead of the simple one here. 110 */ 111 #define mb() dsb() 112 #define __iormb() dmb() 113 #define __iowmb() dmb() 114 115 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; }) 116 #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; }) 117 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) 118 #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; }) 119 120 #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; }) 121 #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; }) 122 #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) 123 #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; }) 124 125 /* 126 * The compiler seems to be incapable of optimising constants 127 * properly. Spell it out to the compiler in some cases. 128 * These are only valid for small values of "off" (< 1<<12) 129 */ 130 #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) 131 #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) 132 #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) 133 134 #define __raw_base_readb(base,off) __arch_base_getb(base,off) 135 #define __raw_base_readw(base,off) __arch_base_getw(base,off) 136 #define __raw_base_readl(base,off) __arch_base_getl(base,off) 137 138 /* 139 * Clear and set bits in one shot. These macros can be used to clear and 140 * set multiple bits in a register using a single call. These macros can 141 * also be used to set a multiple-bit bit pattern using a mask, by 142 * specifying the mask in the 'clear' parameter and the new bit pattern 143 * in the 'set' parameter. 144 */ 145 146 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) 147 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) 148 149 #define out_le64(a,v) out_arch(q,le64,a,v) 150 #define out_le32(a,v) out_arch(l,le32,a,v) 151 #define out_le16(a,v) out_arch(w,le16,a,v) 152 153 #define in_le64(a) in_arch(q,le64,a) 154 #define in_le32(a) in_arch(l,le32,a) 155 #define in_le16(a) in_arch(w,le16,a) 156 157 #define out_be32(a,v) out_arch(l,be32,a,v) 158 #define out_be16(a,v) out_arch(w,be16,a,v) 159 160 #define in_be32(a) in_arch(l,be32,a) 161 #define in_be16(a) in_arch(w,be16,a) 162 163 #define out_32(a,v) __raw_writel(v,a) 164 #define out_16(a,v) __raw_writew(v,a) 165 #define out_8(a,v) __raw_writeb(v,a) 166 167 #define in_32(a) __raw_readl(a) 168 #define in_16(a) __raw_readw(a) 169 #define in_8(a) __raw_readb(a) 170 171 #define clrbits(type, addr, clear) \ 172 out_##type((addr), in_##type(addr) & ~(clear)) 173 174 #define setbits(type, addr, set) \ 175 out_##type((addr), in_##type(addr) | (set)) 176 177 #define clrsetbits(type, addr, clear, set) \ 178 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 179 180 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 181 #define setbits_be32(addr, set) setbits(be32, addr, set) 182 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 183 184 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 185 #define setbits_le32(addr, set) setbits(le32, addr, set) 186 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 187 188 #define clrbits_32(addr, clear) clrbits(32, addr, clear) 189 #define setbits_32(addr, set) setbits(32, addr, set) 190 #define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set) 191 192 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 193 #define setbits_be16(addr, set) setbits(be16, addr, set) 194 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 195 196 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 197 #define setbits_le16(addr, set) setbits(le16, addr, set) 198 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 199 200 #define clrbits_16(addr, clear) clrbits(16, addr, clear) 201 #define setbits_16(addr, set) setbits(16, addr, set) 202 #define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set) 203 204 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 205 #define setbits_8(addr, set) setbits(8, addr, set) 206 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 207 208 /* 209 * Now, pick up the machine-defined IO definitions 210 */ 211 #if 0 /* XXX###XXX */ 212 #include <asm/arch/io.h> 213 #endif /* XXX###XXX */ 214 215 /* 216 * IO port access primitives 217 * ------------------------- 218 * 219 * The ARM doesn't have special IO access instructions; all IO is memory 220 * mapped. Note that these are defined to perform little endian accesses 221 * only. Their primary purpose is to access PCI and ISA peripherals. 222 * 223 * Note that for a big endian machine, this implies that the following 224 * big endian mode connectivity is in place, as described by numerous 225 * ARM documents: 226 * 227 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 228 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 229 * 230 * The machine specific io.h include defines __io to translate an "IO" 231 * address to a memory address. 232 * 233 * Note that we prevent GCC re-ordering or caching values in expressions 234 * by introducing sequence points into the in*() definitions. Note that 235 * __raw_* do not guarantee this behaviour. 236 * 237 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 238 */ 239 #ifdef __io 240 #define outb(v,p) __raw_writeb(v,__io(p)) 241 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) 242 #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p)) 243 244 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 245 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 246 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 247 248 #define outsb(p,d,l) __raw_writesb(__io(p),d,l) 249 #define outsw(p,d,l) __raw_writesw(__io(p),d,l) 250 #define outsl(p,d,l) __raw_writesl(__io(p),d,l) 251 252 #define insb(p,d,l) __raw_readsb(__io(p),d,l) 253 #define insw(p,d,l) __raw_readsw(__io(p),d,l) 254 #define insl(p,d,l) __raw_readsl(__io(p),d,l) 255 #endif 256 257 #define outb_p(val,port) outb((val),(port)) 258 #define outw_p(val,port) outw((val),(port)) 259 #define outl_p(val,port) outl((val),(port)) 260 #define inb_p(port) inb((port)) 261 #define inw_p(port) inw((port)) 262 #define inl_p(port) inl((port)) 263 264 #define outsb_p(port,from,len) outsb(port,from,len) 265 #define outsw_p(port,from,len) outsw(port,from,len) 266 #define outsl_p(port,from,len) outsl(port,from,len) 267 #define insb_p(port,to,len) insb(port,to,len) 268 #define insw_p(port,to,len) insw(port,to,len) 269 #define insl_p(port,to,len) insl(port,to,len) 270 271 #define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s) 272 #define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s) 273 #define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s) 274 #define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s) 275 #define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s) 276 #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s) 277 278 /* 279 * DMA-consistent mapping functions. These allocate/free a region of 280 * uncached, unwrite-buffered mapped memory space for use with DMA 281 * devices. This is the "generic" version. The PCI specific version 282 * is in pci.h 283 */ 284 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 285 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 286 extern void consistent_sync(void *vaddr, size_t size, int rw); 287 288 /* 289 * String version of IO memory access ops: 290 */ 291 extern void _memcpy_fromio(void *, unsigned long, size_t); 292 extern void _memcpy_toio(unsigned long, const void *, size_t); 293 extern void _memset_io(unsigned long, int, size_t); 294 295 extern void __readwrite_bug(const char *fn); 296 297 /* 298 * If this architecture has PCI memory IO, then define the read/write 299 * macros. These should only be used with the cookie passed from 300 * ioremap. 301 */ 302 #ifdef __mem_pci 303 304 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) 305 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 306 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 307 308 #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) 309 #define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c)) 310 #define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c)) 311 312 #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) 313 #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) 314 #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) 315 316 #define eth_io_copy_and_sum(s,c,l,b) \ 317 eth_copy_and_sum((s),__mem_pci(c),(l),(b)) 318 319 static inline int 320 check_signature(unsigned long io_addr, const unsigned char *signature, 321 int length) 322 { 323 int retval = 0; 324 do { 325 if (readb(io_addr) != *signature) 326 goto out; 327 io_addr++; 328 signature++; 329 length--; 330 } while (length); 331 retval = 1; 332 out: 333 return retval; 334 } 335 336 #else 337 #define memset_io(a, b, c) memset((void *)(a), (b), (c)) 338 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) 339 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) 340 341 #if !defined(readb) 342 343 #define readb(addr) (__readwrite_bug("readb"),0) 344 #define readw(addr) (__readwrite_bug("readw"),0) 345 #define readl(addr) (__readwrite_bug("readl"),0) 346 #define writeb(v,addr) __readwrite_bug("writeb") 347 #define writew(v,addr) __readwrite_bug("writew") 348 #define writel(v,addr) __readwrite_bug("writel") 349 350 #define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum") 351 352 #define check_signature(io,sig,len) (0) 353 354 #endif 355 #endif /* __mem_pci */ 356 357 /* 358 * If this architecture has ISA IO, then define the isa_read/isa_write 359 * macros. 360 */ 361 #ifdef __mem_isa 362 363 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 364 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 365 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 366 #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) 367 #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) 368 #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) 369 #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) 370 #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) 371 #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) 372 373 #define isa_eth_io_copy_and_sum(a,b,c,d) \ 374 eth_copy_and_sum((a),__mem_isa(b),(c),(d)) 375 376 static inline int 377 isa_check_signature(unsigned long io_addr, const unsigned char *signature, 378 int length) 379 { 380 int retval = 0; 381 do { 382 if (isa_readb(io_addr) != *signature) 383 goto out; 384 io_addr++; 385 signature++; 386 length--; 387 } while (length); 388 retval = 1; 389 out: 390 return retval; 391 } 392 393 #else /* __mem_isa */ 394 395 #define isa_readb(addr) (__readwrite_bug("isa_readb"),0) 396 #define isa_readw(addr) (__readwrite_bug("isa_readw"),0) 397 #define isa_readl(addr) (__readwrite_bug("isa_readl"),0) 398 #define isa_writeb(val,addr) __readwrite_bug("isa_writeb") 399 #define isa_writew(val,addr) __readwrite_bug("isa_writew") 400 #define isa_writel(val,addr) __readwrite_bug("isa_writel") 401 #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") 402 #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") 403 #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") 404 405 #define isa_eth_io_copy_and_sum(a,b,c,d) \ 406 __readwrite_bug("isa_eth_io_copy_and_sum") 407 408 #define isa_check_signature(io,sig,len) (0) 409 410 #endif /* __mem_isa */ 411 #endif /* __KERNEL__ */ 412 413 #include <asm-generic/io.h> 414 #include <iotrace.h> 415 416 #endif /* __ASM_ARM_IO_H */ 417