1 /* 2 * linux/include/asm-arm/io.h 3 * 4 * Copyright (C) 1996-2000 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Modifications: 11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 12 * constant addresses and variable addresses. 13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 14 * specific IO header files. 15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 16 * 04-Apr-1999 PJB Added check_signature. 17 * 12-Dec-1999 RMK More cleanups 18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 19 */ 20 #ifndef __ASM_ARM_IO_H 21 #define __ASM_ARM_IO_H 22 23 #ifdef __KERNEL__ 24 25 #include <linux/types.h> 26 #include <asm/byteorder.h> 27 #include <asm/memory.h> 28 #if 0 /* XXX###XXX */ 29 #include <asm/arch/hardware.h> 30 #endif /* XXX###XXX */ 31 32 static inline void sync(void) 33 { 34 } 35 36 /* 37 * Given a physical address and a length, return a virtual address 38 * that can be used to access the memory range with the caching 39 * properties specified by "flags". 40 */ 41 #define MAP_NOCACHE (0) 42 #define MAP_WRCOMBINE (0) 43 #define MAP_WRBACK (0) 44 #define MAP_WRTHROUGH (0) 45 46 static inline void * 47 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 48 { 49 return (void *)paddr; 50 } 51 52 /* 53 * Take down a mapping set up by map_physmem(). 54 */ 55 static inline void unmap_physmem(void *vaddr, unsigned long flags) 56 { 57 58 } 59 60 static inline phys_addr_t virt_to_phys(void * vaddr) 61 { 62 return (phys_addr_t)(vaddr); 63 } 64 65 /* 66 * Generic virtual read/write. Note that we don't support half-word 67 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 68 * to the architecture specific code. 69 */ 70 #define __arch_getb(a) (*(volatile unsigned char *)(a)) 71 #define __arch_getw(a) (*(volatile unsigned short *)(a)) 72 #define __arch_getl(a) (*(volatile unsigned int *)(a)) 73 74 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) 75 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) 76 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) 77 78 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); 79 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); 80 extern void __raw_writesl(unsigned int addr, const void *data, int longlen); 81 82 extern void __raw_readsb(unsigned int addr, void *data, int bytelen); 83 extern void __raw_readsw(unsigned int addr, void *data, int wordlen); 84 extern void __raw_readsl(unsigned int addr, void *data, int longlen); 85 86 #define __raw_writeb(v,a) __arch_putb(v,a) 87 #define __raw_writew(v,a) __arch_putw(v,a) 88 #define __raw_writel(v,a) __arch_putl(v,a) 89 90 #define __raw_readb(a) __arch_getb(a) 91 #define __raw_readw(a) __arch_getw(a) 92 #define __raw_readl(a) __arch_getl(a) 93 94 #define writeb(v,a) __arch_putb(v,a) 95 #define writew(v,a) __arch_putw(v,a) 96 #define writel(v,a) __arch_putl(v,a) 97 98 #define readb(a) __arch_getb(a) 99 #define readw(a) __arch_getw(a) 100 #define readl(a) __arch_getl(a) 101 102 /* 103 * The compiler seems to be incapable of optimising constants 104 * properly. Spell it out to the compiler in some cases. 105 * These are only valid for small values of "off" (< 1<<12) 106 */ 107 #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) 108 #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) 109 #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) 110 111 #define __raw_base_readb(base,off) __arch_base_getb(base,off) 112 #define __raw_base_readw(base,off) __arch_base_getw(base,off) 113 #define __raw_base_readl(base,off) __arch_base_getl(base,off) 114 115 /* 116 * Clear and set bits in one shot. These macros can be used to clear and 117 * set multiple bits in a register using a single call. These macros can 118 * also be used to set a multiple-bit bit pattern using a mask, by 119 * specifying the mask in the 'clear' parameter and the new bit pattern 120 * in the 'set' parameter. 121 */ 122 123 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) 124 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) 125 126 #define out_le32(a,v) out_arch(l,le32,a,v) 127 #define out_le16(a,v) out_arch(w,le16,a,v) 128 129 #define in_le32(a) in_arch(l,le32,a) 130 #define in_le16(a) in_arch(w,le16,a) 131 132 #define out_be32(a,v) out_arch(l,be32,a,v) 133 #define out_be16(a,v) out_arch(w,be16,a,v) 134 135 #define in_be32(a) in_arch(l,be32,a) 136 #define in_be16(a) in_arch(w,be16,a) 137 138 #define out_8(a,v) __raw_writeb(v,a) 139 #define in_8(a) __raw_readb(a) 140 141 #define clrbits(type, addr, clear) \ 142 out_##type((addr), in_##type(addr) & ~(clear)) 143 144 #define setbits(type, addr, set) \ 145 out_##type((addr), in_##type(addr) | (set)) 146 147 #define clrsetbits(type, addr, clear, set) \ 148 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 149 150 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 151 #define setbits_be32(addr, set) setbits(be32, addr, set) 152 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 153 154 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 155 #define setbits_le32(addr, set) setbits(le32, addr, set) 156 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 157 158 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 159 #define setbits_be16(addr, set) setbits(be16, addr, set) 160 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 161 162 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 163 #define setbits_le16(addr, set) setbits(le16, addr, set) 164 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 165 166 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 167 #define setbits_8(addr, set) setbits(8, addr, set) 168 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 169 170 /* 171 * Now, pick up the machine-defined IO definitions 172 */ 173 #if 0 /* XXX###XXX */ 174 #include <asm/arch/io.h> 175 #endif /* XXX###XXX */ 176 177 /* 178 * IO port access primitives 179 * ------------------------- 180 * 181 * The ARM doesn't have special IO access instructions; all IO is memory 182 * mapped. Note that these are defined to perform little endian accesses 183 * only. Their primary purpose is to access PCI and ISA peripherals. 184 * 185 * Note that for a big endian machine, this implies that the following 186 * big endian mode connectivity is in place, as described by numerous 187 * ARM documents: 188 * 189 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 190 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 191 * 192 * The machine specific io.h include defines __io to translate an "IO" 193 * address to a memory address. 194 * 195 * Note that we prevent GCC re-ordering or caching values in expressions 196 * by introducing sequence points into the in*() definitions. Note that 197 * __raw_* do not guarantee this behaviour. 198 * 199 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 200 */ 201 #ifdef __io 202 #define outb(v,p) __raw_writeb(v,__io(p)) 203 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) 204 #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p)) 205 206 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 207 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 208 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 209 210 #define outsb(p,d,l) __raw_writesb(__io(p),d,l) 211 #define outsw(p,d,l) __raw_writesw(__io(p),d,l) 212 #define outsl(p,d,l) __raw_writesl(__io(p),d,l) 213 214 #define insb(p,d,l) __raw_readsb(__io(p),d,l) 215 #define insw(p,d,l) __raw_readsw(__io(p),d,l) 216 #define insl(p,d,l) __raw_readsl(__io(p),d,l) 217 #endif 218 219 #define outb_p(val,port) outb((val),(port)) 220 #define outw_p(val,port) outw((val),(port)) 221 #define outl_p(val,port) outl((val),(port)) 222 #define inb_p(port) inb((port)) 223 #define inw_p(port) inw((port)) 224 #define inl_p(port) inl((port)) 225 226 #define outsb_p(port,from,len) outsb(port,from,len) 227 #define outsw_p(port,from,len) outsw(port,from,len) 228 #define outsl_p(port,from,len) outsl(port,from,len) 229 #define insb_p(port,to,len) insb(port,to,len) 230 #define insw_p(port,to,len) insw(port,to,len) 231 #define insl_p(port,to,len) insl(port,to,len) 232 233 /* 234 * ioremap and friends. 235 * 236 * ioremap takes a PCI memory address, as specified in 237 * linux/Documentation/IO-mapping.txt. If you want a 238 * physical address, use __ioremap instead. 239 */ 240 extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); 241 extern void __iounmap(void *addr); 242 243 /* 244 * Generic ioremap support. 245 * 246 * Define: 247 * iomem_valid_addr(off,size) 248 * iomem_to_phys(off) 249 */ 250 #ifdef iomem_valid_addr 251 #define __arch_ioremap(off,sz,nocache) \ 252 ({ \ 253 unsigned long _off = (off), _size = (sz); \ 254 void *_ret = (void *)0; \ 255 if (iomem_valid_addr(_off, _size)) \ 256 _ret = __ioremap(iomem_to_phys(_off),_size,0); \ 257 _ret; \ 258 }) 259 260 #define __arch_iounmap __iounmap 261 #endif 262 263 #define ioremap(off,sz) __arch_ioremap((off),(sz),0) 264 #define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) 265 #define iounmap(_addr) __arch_iounmap(_addr) 266 267 /* 268 * DMA-consistent mapping functions. These allocate/free a region of 269 * uncached, unwrite-buffered mapped memory space for use with DMA 270 * devices. This is the "generic" version. The PCI specific version 271 * is in pci.h 272 */ 273 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 274 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 275 extern void consistent_sync(void *vaddr, size_t size, int rw); 276 277 /* 278 * String version of IO memory access ops: 279 */ 280 extern void _memcpy_fromio(void *, unsigned long, size_t); 281 extern void _memcpy_toio(unsigned long, const void *, size_t); 282 extern void _memset_io(unsigned long, int, size_t); 283 284 extern void __readwrite_bug(const char *fn); 285 286 /* 287 * If this architecture has PCI memory IO, then define the read/write 288 * macros. These should only be used with the cookie passed from 289 * ioremap. 290 */ 291 #ifdef __mem_pci 292 293 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) 294 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 295 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 296 297 #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) 298 #define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c)) 299 #define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c)) 300 301 #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) 302 #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) 303 #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) 304 305 #define eth_io_copy_and_sum(s,c,l,b) \ 306 eth_copy_and_sum((s),__mem_pci(c),(l),(b)) 307 308 static inline int 309 check_signature(unsigned long io_addr, const unsigned char *signature, 310 int length) 311 { 312 int retval = 0; 313 do { 314 if (readb(io_addr) != *signature) 315 goto out; 316 io_addr++; 317 signature++; 318 length--; 319 } while (length); 320 retval = 1; 321 out: 322 return retval; 323 } 324 325 #elif !defined(readb) 326 327 #define readb(addr) (__readwrite_bug("readb"),0) 328 #define readw(addr) (__readwrite_bug("readw"),0) 329 #define readl(addr) (__readwrite_bug("readl"),0) 330 #define writeb(v,addr) __readwrite_bug("writeb") 331 #define writew(v,addr) __readwrite_bug("writew") 332 #define writel(v,addr) __readwrite_bug("writel") 333 334 #define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum") 335 336 #define check_signature(io,sig,len) (0) 337 338 #endif /* __mem_pci */ 339 340 /* 341 * If this architecture has ISA IO, then define the isa_read/isa_write 342 * macros. 343 */ 344 #ifdef __mem_isa 345 346 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 347 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 348 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 349 #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) 350 #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) 351 #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) 352 #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) 353 #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) 354 #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) 355 356 #define isa_eth_io_copy_and_sum(a,b,c,d) \ 357 eth_copy_and_sum((a),__mem_isa(b),(c),(d)) 358 359 static inline int 360 isa_check_signature(unsigned long io_addr, const unsigned char *signature, 361 int length) 362 { 363 int retval = 0; 364 do { 365 if (isa_readb(io_addr) != *signature) 366 goto out; 367 io_addr++; 368 signature++; 369 length--; 370 } while (length); 371 retval = 1; 372 out: 373 return retval; 374 } 375 376 #else /* __mem_isa */ 377 378 #define isa_readb(addr) (__readwrite_bug("isa_readb"),0) 379 #define isa_readw(addr) (__readwrite_bug("isa_readw"),0) 380 #define isa_readl(addr) (__readwrite_bug("isa_readl"),0) 381 #define isa_writeb(val,addr) __readwrite_bug("isa_writeb") 382 #define isa_writew(val,addr) __readwrite_bug("isa_writew") 383 #define isa_writel(val,addr) __readwrite_bug("isa_writel") 384 #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") 385 #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") 386 #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") 387 388 #define isa_eth_io_copy_and_sum(a,b,c,d) \ 389 __readwrite_bug("isa_eth_io_copy_and_sum") 390 391 #define isa_check_signature(io,sig,len) (0) 392 393 #endif /* __mem_isa */ 394 #endif /* __KERNEL__ */ 395 #endif /* __ASM_ARM_IO_H */ 396