1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
9 
10 #ifdef CONFIG_CHAIN_OF_TRUST
11 #define CONFIG_CMD_ESBC_VALIDATE
12 #define CONFIG_FSL_SEC_MON
13 #define CONFIG_SHA_HW_ACCEL
14 #define CONFIG_SHA_PROG_HW_ACCEL
15 
16 #define CONFIG_SPL_BOARD_INIT
17 #ifdef CONFIG_SPL_BUILD
18 /*
19  * Define the key hash for U-Boot here if public/private key pair used to
20  * sign U-boot are different from the SRK hash put in the fuse
21  * Example of defining KEY_HASH is
22  * #define CONFIG_SPL_UBOOT_KEY_HASH \
23  *      "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
24  * else leave it defined as NULL
25  */
26 
27 #define CONFIG_SPL_UBOOT_KEY_HASH	NULL
28 #endif /* ifdef CONFIG_SPL_BUILD */
29 
30 #define CONFIG_KEY_REVOCATION
31 
32 #ifndef CONFIG_SPL_BUILD
33 #define CONFIG_CMD_HASH
34 #ifndef CONFIG_SYS_RAMBOOT
35 /* The key used for verification of next level images
36  * is picked up from an Extension Table which has
37  * been verified by the ISBC (Internal Secure boot Code)
38  * in boot ROM of the SoC.
39  * The feature is only applicable in case of NOR boot and is
40  * not applicable in case of RAMBOOT (NAND, SD, SPI).
41  * For LS, this feature is available for all device if IE Table
42  * is copied to XIP memory
43  * Also, for LS, ISBC doesn't verify this table.
44  */
45 #define CONFIG_FSL_ISBC_KEY_EXT
46 
47 #endif
48 
49 #if defined(CONFIG_FSL_LAYERSCAPE)
50 /*
51  * For fsl layerscape based platforms, ESBC image Address in Header
52  * is 64 bit.
53  */
54 #define CONFIG_ESBC_ADDR_64BIT
55 #endif
56 
57 #ifdef CONFIG_ARCH_LS2080A
58 #define CONFIG_EXTRA_ENV \
59 	"setenv fdt_high 0xa0000000;"	\
60 	"setenv initrd_high 0xcfffffff;"	\
61 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
62 #else
63 #define CONFIG_EXTRA_ENV \
64 	"setenv fdt_high 0xffffffff;"	\
65 	"setenv initrd_high 0xffffffff;"	\
66 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
67 #endif
68 
69 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
70  * Non-XIP Memory (Nand/SD)*/
71 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
72 	defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
73 #define CONFIG_BOOTSCRIPT_COPY_RAM
74 #endif
75 /* The address needs to be modified according to NOR, NAND, SD and
76  * DDR memory map
77  */
78 #ifdef CONFIG_FSL_LSCH3
79 #define CONFIG_BS_HDR_ADDR_DEVICE	0x580d00000
80 #define CONFIG_BS_ADDR_DEVICE		0x580e00000
81 #define CONFIG_BS_HDR_ADDR_RAM		0xa0d00000
82 #define CONFIG_BS_ADDR_RAM		0xa0e00000
83 #define CONFIG_BS_HDR_SIZE		0x00002000
84 #define CONFIG_BS_SIZE			0x00001000
85 #else
86 #ifdef CONFIG_SD_BOOT
87 /* For SD boot address and size are assigned in terms of sector
88  * offset and no. of sectors respectively.
89  */
90 #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
91 #define CONFIG_BS_HDR_ADDR_DEVICE	0x00000920
92 #else
93 #define CONFIG_BS_HDR_ADDR_DEVICE       0x00000900
94 #endif
95 #define CONFIG_BS_ADDR_DEVICE		0x00000940
96 #define CONFIG_BS_HDR_SIZE		0x00000010
97 #define CONFIG_BS_SIZE			0x00000008
98 #elif defined(CONFIG_NAND_BOOT)
99 #define CONFIG_BS_HDR_ADDR_DEVICE      0x00800000
100 #define CONFIG_BS_ADDR_DEVICE          0x00802000
101 #define CONFIG_BS_HDR_SIZE             0x00002000
102 #define CONFIG_BS_SIZE                 0x00001000
103 #elif defined(CONFIG_QSPI_BOOT)
104 #ifdef CONFIG_ARCH_LS1046A
105 #define CONFIG_BS_HDR_ADDR_DEVICE	0x40780000
106 #define CONFIG_BS_ADDR_DEVICE		0x40800000
107 #elif defined(CONFIG_ARCH_LS1012A)
108 #define CONFIG_BS_HDR_ADDR_DEVICE      0x400c0000
109 #define CONFIG_BS_ADDR_DEVICE          0x40060000
110 #else
111 #error "Platform not supported"
112 #endif
113 #define CONFIG_BS_HDR_SIZE		0x00002000
114 #define CONFIG_BS_SIZE			0x00001000
115 #else /* Default NOR Boot */
116 #define CONFIG_BS_HDR_ADDR_DEVICE	0x600a0000
117 #define CONFIG_BS_ADDR_DEVICE		0x60060000
118 #define CONFIG_BS_HDR_SIZE		0x00002000
119 #define CONFIG_BS_SIZE			0x00001000
120 #endif
121 #define CONFIG_BS_HDR_ADDR_RAM		0x81000000
122 #define CONFIG_BS_ADDR_RAM		0x81020000
123 #endif
124 
125 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
126 #define CONFIG_BOOTSCRIPT_HDR_ADDR	CONFIG_BS_HDR_ADDR_RAM
127 #define CONFIG_BOOTSCRIPT_ADDR		CONFIG_BS_ADDR_RAM
128 #else
129 #define CONFIG_BOOTSCRIPT_HDR_ADDR	CONFIG_BS_HDR_ADDR_DEVICE
130 /* BOOTSCRIPT_ADDR is not required */
131 #endif
132 
133 #ifdef CONFIG_FSL_LS_PPA
134 /* Define the key hash here if SRK used for signing PPA image is
135  * different from SRK hash put in SFP used for U-Boot.
136  * Example
137  * #define PPA_KEY_HASH \
138  *	"41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
139  */
140 #define PPA_KEY_HASH		NULL
141 #endif /* ifdef CONFIG_FSL_LS_PPA */
142 
143 #include <config_fsl_chain_trust.h>
144 #endif /* #ifndef CONFIG_SPL_BUILD */
145 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
146 #endif
147