1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __FSL_SECURE_BOOT_H 8 #define __FSL_SECURE_BOOT_H 9 10 #ifdef CONFIG_CHAIN_OF_TRUST 11 #define CONFIG_CMD_ESBC_VALIDATE 12 #define CONFIG_FSL_SEC_MON 13 14 #ifdef CONFIG_SPL_BUILD 15 /* 16 * Define the key hash for U-Boot here if public/private key pair used to 17 * sign U-boot are different from the SRK hash put in the fuse 18 * Example of defining KEY_HASH is 19 * #define CONFIG_SPL_UBOOT_KEY_HASH \ 20 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 21 * else leave it defined as NULL 22 */ 23 24 #define CONFIG_SPL_UBOOT_KEY_HASH NULL 25 #endif /* ifdef CONFIG_SPL_BUILD */ 26 27 #define CONFIG_KEY_REVOCATION 28 29 #ifndef CONFIG_SPL_BUILD 30 #define CONFIG_CMD_HASH 31 #ifndef CONFIG_SYS_RAMBOOT 32 /* The key used for verification of next level images 33 * is picked up from an Extension Table which has 34 * been verified by the ISBC (Internal Secure boot Code) 35 * in boot ROM of the SoC. 36 * The feature is only applicable in case of NOR boot and is 37 * not applicable in case of RAMBOOT (NAND, SD, SPI). 38 * For LS, this feature is available for all device if IE Table 39 * is copied to XIP memory 40 * Also, for LS, ISBC doesn't verify this table. 41 */ 42 #define CONFIG_FSL_ISBC_KEY_EXT 43 44 #endif 45 46 #if defined(CONFIG_FSL_LAYERSCAPE) 47 /* 48 * For fsl layerscape based platforms, ESBC image Address in Header 49 * is 64 bit. 50 */ 51 #define CONFIG_ESBC_ADDR_64BIT 52 #endif 53 54 #ifdef CONFIG_ARCH_LS2080A 55 #define CONFIG_EXTRA_ENV \ 56 "setenv fdt_high 0xa0000000;" \ 57 "setenv initrd_high 0xcfffffff;" \ 58 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 59 #else 60 #define CONFIG_EXTRA_ENV \ 61 "setenv fdt_high 0xffffffff;" \ 62 "setenv initrd_high 0xffffffff;" \ 63 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 64 #endif 65 66 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from 67 * Non-XIP Memory (Nand/SD)*/ 68 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ 69 defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT) 70 #define CONFIG_BOOTSCRIPT_COPY_RAM 71 #endif 72 /* The address needs to be modified according to NOR, NAND, SD and 73 * DDR memory map 74 */ 75 #ifdef CONFIG_FSL_LSCH3 76 #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000 77 #define CONFIG_BS_ADDR_DEVICE 0x580e00000 78 #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000 79 #define CONFIG_BS_ADDR_RAM 0xa0e00000 80 #define CONFIG_BS_HDR_SIZE 0x00002000 81 #define CONFIG_BS_SIZE 0x00001000 82 #else 83 #ifdef CONFIG_SD_BOOT 84 /* For SD boot address and size are assigned in terms of sector 85 * offset and no. of sectors respectively. 86 */ 87 #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) 88 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 89 #else 90 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 91 #endif 92 #define CONFIG_BS_ADDR_DEVICE 0x00000940 93 #define CONFIG_BS_HDR_SIZE 0x00000010 94 #define CONFIG_BS_SIZE 0x00000008 95 #elif defined(CONFIG_NAND_BOOT) 96 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 97 #define CONFIG_BS_ADDR_DEVICE 0x00802000 98 #define CONFIG_BS_HDR_SIZE 0x00002000 99 #define CONFIG_BS_SIZE 0x00001000 100 #elif defined(CONFIG_QSPI_BOOT) 101 #ifdef CONFIG_ARCH_LS1046A 102 #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 103 #define CONFIG_BS_ADDR_DEVICE 0x40800000 104 #elif defined(CONFIG_ARCH_LS1012A) 105 #define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000 106 #define CONFIG_BS_ADDR_DEVICE 0x40060000 107 #else 108 #error "Platform not supported" 109 #endif 110 #define CONFIG_BS_HDR_SIZE 0x00002000 111 #define CONFIG_BS_SIZE 0x00001000 112 #else /* Default NOR Boot */ 113 #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000 114 #define CONFIG_BS_ADDR_DEVICE 0x60060000 115 #define CONFIG_BS_HDR_SIZE 0x00002000 116 #define CONFIG_BS_SIZE 0x00001000 117 #endif 118 #define CONFIG_BS_HDR_ADDR_RAM 0x81000000 119 #define CONFIG_BS_ADDR_RAM 0x81020000 120 #endif 121 122 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM 123 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM 124 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM 125 #else 126 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE 127 /* BOOTSCRIPT_ADDR is not required */ 128 #endif 129 130 #ifdef CONFIG_FSL_LS_PPA 131 /* Define the key hash here if SRK used for signing PPA image is 132 * different from SRK hash put in SFP used for U-Boot. 133 * Example 134 * #define PPA_KEY_HASH \ 135 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 136 */ 137 #define PPA_KEY_HASH NULL 138 #endif /* ifdef CONFIG_FSL_LS_PPA */ 139 140 #include <config_fsl_chain_trust.h> 141 #endif /* #ifndef CONFIG_SPL_BUILD */ 142 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ 143 #endif 144