1 /* 2 * Copyright (C) 2015 3 * Toradex, Inc. 4 * 5 * Authors: Stefan Agner 6 * Sanchayan Maity 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ASM_ARCH_VF610_DDRMC_H 12 #define __ASM_ARCH_VF610_DDRMC_H 13 14 struct ddrmc_lvl_info { 15 u16 wrlvl_reg_en; 16 u16 wrlvl_dl_0; 17 u16 wrlvl_dl_1; 18 u16 rdlvl_gt_reg_en; 19 u16 rdlvl_gt_dl_0; 20 u16 rdlvl_gt_dl_1; 21 u16 rdlvl_reg_en; 22 u16 rdlvl_dl_0; 23 u16 rdlvl_dl_1; 24 }; 25 26 struct ddr3_jedec_timings { 27 u8 tinit; 28 u32 trst_pwron; 29 u32 cke_inactive; 30 u8 wrlat; 31 u8 caslat_lin; 32 u8 trc; 33 u8 trrd; 34 u8 tccd; 35 u8 tfaw; 36 u8 trp; 37 u8 twtr; 38 u8 tras_min; 39 u8 tmrd; 40 u8 trtp; 41 u32 tras_max; 42 u8 tmod; 43 u8 tckesr; 44 u8 tcke; 45 u8 trcd_int; 46 u8 tdal; 47 u16 tdll; 48 u8 trp_ab; 49 u16 tref; 50 u8 trfc; 51 u8 tpdex; 52 u8 txpdll; 53 u8 txsnr; 54 u16 txsr; 55 u8 cksrx; 56 u8 cksre; 57 u16 zqcl; 58 u16 zqinit; 59 u8 zqcs; 60 u8 ref_per_zq; 61 u8 aprebit; 62 u8 wlmrd; 63 u8 wldqsen; 64 }; 65 66 void ddrmc_setup_iomux(void); 67 void ddrmc_phy_init(void); 68 void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, 69 struct ddrmc_lvl_info *lvl, 70 int col_diff, int row_diff); 71 72 #endif 73