1e1ae0d1fSSimon Glass /* 2e1ae0d1fSSimon Glass * Tegra pulse width frequency modulator definitions 3e1ae0d1fSSimon Glass * 4e1ae0d1fSSimon Glass * Copyright (c) 2011 The Chromium OS Authors. 5e1ae0d1fSSimon Glass * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7e1ae0d1fSSimon Glass */ 8e1ae0d1fSSimon Glass 9e1ae0d1fSSimon Glass #ifndef __ASM_ARCH_TEGRA_PWM_H 10e1ae0d1fSSimon Glass #define __ASM_ARCH_TEGRA_PWM_H 11e1ae0d1fSSimon Glass 12e1ae0d1fSSimon Glass /* This is a single PWM channel */ 13e1ae0d1fSSimon Glass struct pwm_ctlr { 14e1ae0d1fSSimon Glass uint control; /* Control register */ 15e1ae0d1fSSimon Glass uint reserved[3]; /* Space space */ 16e1ae0d1fSSimon Glass }; 17e1ae0d1fSSimon Glass 18e1ae0d1fSSimon Glass #define PWM_NUM_CHANNELS 4 19e1ae0d1fSSimon Glass 20e1ae0d1fSSimon Glass /* PWM_CONTROLLER_PWM_CSR_0/1/2/3_0 */ 21e1ae0d1fSSimon Glass #define PWM_ENABLE_SHIFT 31 22e1ae0d1fSSimon Glass #define PWM_ENABLE_MASK (0x1 << PWM_ENABLE_SHIFT) 23e1ae0d1fSSimon Glass 24e1ae0d1fSSimon Glass #define PWM_WIDTH_SHIFT 16 25e1ae0d1fSSimon Glass #define PWM_WIDTH_MASK (0x7FFF << PWM_WIDTH_SHIFT) 26e1ae0d1fSSimon Glass 27e1ae0d1fSSimon Glass #define PWM_DIVIDER_SHIFT 0 28e1ae0d1fSSimon Glass #define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT) 29e1ae0d1fSSimon Glass 30e1ae0d1fSSimon Glass /** 31e1ae0d1fSSimon Glass * Program the PWM with the given parameters. 32e1ae0d1fSSimon Glass * 33e1ae0d1fSSimon Glass * @param channel PWM channel to update 34e1ae0d1fSSimon Glass * @param rate Clock rate to use for PWM 35e1ae0d1fSSimon Glass * @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high, 36e1ae0d1fSSimon Glass * n = n/256 pulse high 37e1ae0d1fSSimon Glass * @param freq_divider frequency divider value (1 to use rate as is) 38e1ae0d1fSSimon Glass */ 39e1ae0d1fSSimon Glass void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider); 40e1ae0d1fSSimon Glass 41e1ae0d1fSSimon Glass /** 42e1ae0d1fSSimon Glass * Request a pwm channel as referenced by a device tree node. 43e1ae0d1fSSimon Glass * 44e1ae0d1fSSimon Glass * This channel can then be passed to pwm_enable(). 45e1ae0d1fSSimon Glass * 46e1ae0d1fSSimon Glass * @param blob Device tree blob 47e1ae0d1fSSimon Glass * @param node Node containing reference to pwm 48e1ae0d1fSSimon Glass * @param prop_name Property name of pwm reference 49e1ae0d1fSSimon Glass * @return channel number, if ok, else -1 50e1ae0d1fSSimon Glass */ 51e1ae0d1fSSimon Glass int pwm_request(const void *blob, int node, const char *prop_name); 52e1ae0d1fSSimon Glass 53e1ae0d1fSSimon Glass /** 54e1ae0d1fSSimon Glass * Set up the pwm controller, by looking it up in the fdt. 55e1ae0d1fSSimon Glass * 56e1ae0d1fSSimon Glass * @return 0 if ok, -1 if the device tree node was not found or invalid. 57e1ae0d1fSSimon Glass */ 58e1ae0d1fSSimon Glass int pwm_init(const void *blob); 59e1ae0d1fSSimon Glass 60e1ae0d1fSSimon Glass #endif /* __ASM_ARCH_TEGRA_PWM_H */ 61