1 /* 2 * (C) Copyright 2013 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA124_H_ 9 #define _TEGRA124_H_ 10 11 #define CONFIG_TEGRA124 12 13 #define NV_PA_SDRAM_BASE 0x80000000 14 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ 15 #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */ 16 #define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */ 17 18 #include <asm/arch-tegra/tegra.h> 19 20 #define BCT_ODMDATA_OFFSET 1704 /* offset to ODMDATA word */ 21 22 #undef NVBOOTINFOTABLE_BCTSIZE 23 #undef NVBOOTINFOTABLE_BCTPTR 24 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ 25 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ 26 27 #define MAX_NUM_CPU 4 28 #define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8) 29 30 #define TEGRA_USB1_BASE 0x7D000000 31 32 #endif /* _TEGRA124_H_ */ 33