1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2999c6bafSTom Warren /* 3d68c9429SStephen Warren * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. 4999c6bafSTom Warren */ 5999c6bafSTom Warren 6999c6bafSTom Warren #ifndef _TEGRA124_PINMUX_H_ 7999c6bafSTom Warren #define _TEGRA124_PINMUX_H_ 8999c6bafSTom Warren 9999c6bafSTom Warren enum pmux_pingrp { 10d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA0_PO1, 11d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA1_PO2, 12d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA2_PO3, 13d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA3_PO4, 14d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA4_PO5, 15d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA5_PO6, 16d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA6_PO7, 17d68c9429SStephen Warren PMUX_PINGRP_ULPI_DATA7_PO0, 18d68c9429SStephen Warren PMUX_PINGRP_ULPI_CLK_PY0, 19d68c9429SStephen Warren PMUX_PINGRP_ULPI_DIR_PY1, 20d68c9429SStephen Warren PMUX_PINGRP_ULPI_NXT_PY2, 21d68c9429SStephen Warren PMUX_PINGRP_ULPI_STP_PY3, 22d68c9429SStephen Warren PMUX_PINGRP_DAP3_FS_PP0, 23d68c9429SStephen Warren PMUX_PINGRP_DAP3_DIN_PP1, 24d68c9429SStephen Warren PMUX_PINGRP_DAP3_DOUT_PP2, 25d68c9429SStephen Warren PMUX_PINGRP_DAP3_SCLK_PP3, 26d68c9429SStephen Warren PMUX_PINGRP_PV0, 27d68c9429SStephen Warren PMUX_PINGRP_PV1, 28d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_CLK_PZ0, 29d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_CMD_PZ1, 30d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_DAT3_PY4, 31d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_DAT2_PY5, 32d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_DAT1_PY6, 33d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_DAT0_PY7, 34d68c9429SStephen Warren PMUX_PINGRP_CLK2_OUT_PW5 = (0x68 / 4), 35d68c9429SStephen Warren PMUX_PINGRP_CLK2_REQ_PCC5, 36d68c9429SStephen Warren PMUX_PINGRP_HDMI_INT_PN7 = (0x110 / 4), 37d68c9429SStephen Warren PMUX_PINGRP_DDC_SCL_PV4, 38d68c9429SStephen Warren PMUX_PINGRP_DDC_SDA_PV5, 39d68c9429SStephen Warren PMUX_PINGRP_UART2_RXD_PC3 = (0x164 / 4), 40d68c9429SStephen Warren PMUX_PINGRP_UART2_TXD_PC2, 41d68c9429SStephen Warren PMUX_PINGRP_UART2_RTS_N_PJ6, 42d68c9429SStephen Warren PMUX_PINGRP_UART2_CTS_N_PJ5, 43d68c9429SStephen Warren PMUX_PINGRP_UART3_TXD_PW6, 44d68c9429SStephen Warren PMUX_PINGRP_UART3_RXD_PW7, 45d68c9429SStephen Warren PMUX_PINGRP_UART3_CTS_N_PA1, 46d68c9429SStephen Warren PMUX_PINGRP_UART3_RTS_N_PC0, 47d68c9429SStephen Warren PMUX_PINGRP_PU0, 48d68c9429SStephen Warren PMUX_PINGRP_PU1, 49d68c9429SStephen Warren PMUX_PINGRP_PU2, 50d68c9429SStephen Warren PMUX_PINGRP_PU3, 51d68c9429SStephen Warren PMUX_PINGRP_PU4, 52d68c9429SStephen Warren PMUX_PINGRP_PU5, 53d68c9429SStephen Warren PMUX_PINGRP_PU6, 54d68c9429SStephen Warren PMUX_PINGRP_GEN1_I2C_SDA_PC5, 55d68c9429SStephen Warren PMUX_PINGRP_GEN1_I2C_SCL_PC4, 56d68c9429SStephen Warren PMUX_PINGRP_DAP4_FS_PP4, 57d68c9429SStephen Warren PMUX_PINGRP_DAP4_DIN_PP5, 58d68c9429SStephen Warren PMUX_PINGRP_DAP4_DOUT_PP6, 59d68c9429SStephen Warren PMUX_PINGRP_DAP4_SCLK_PP7, 60d68c9429SStephen Warren PMUX_PINGRP_CLK3_OUT_PEE0, 61d68c9429SStephen Warren PMUX_PINGRP_CLK3_REQ_PEE1, 62d68c9429SStephen Warren PMUX_PINGRP_PC7, 63d68c9429SStephen Warren PMUX_PINGRP_PI5, 64d68c9429SStephen Warren PMUX_PINGRP_PI7, 65d68c9429SStephen Warren PMUX_PINGRP_PK0, 66d68c9429SStephen Warren PMUX_PINGRP_PK1, 67d68c9429SStephen Warren PMUX_PINGRP_PJ0, 68d68c9429SStephen Warren PMUX_PINGRP_PJ2, 69d68c9429SStephen Warren PMUX_PINGRP_PK3, 70d68c9429SStephen Warren PMUX_PINGRP_PK4, 71d68c9429SStephen Warren PMUX_PINGRP_PK2, 72d68c9429SStephen Warren PMUX_PINGRP_PI3, 73d68c9429SStephen Warren PMUX_PINGRP_PI6, 74d68c9429SStephen Warren PMUX_PINGRP_PG0, 75d68c9429SStephen Warren PMUX_PINGRP_PG1, 76d68c9429SStephen Warren PMUX_PINGRP_PG2, 77d68c9429SStephen Warren PMUX_PINGRP_PG3, 78d68c9429SStephen Warren PMUX_PINGRP_PG4, 79d68c9429SStephen Warren PMUX_PINGRP_PG5, 80d68c9429SStephen Warren PMUX_PINGRP_PG6, 81d68c9429SStephen Warren PMUX_PINGRP_PG7, 82d68c9429SStephen Warren PMUX_PINGRP_PH0, 83d68c9429SStephen Warren PMUX_PINGRP_PH1, 84d68c9429SStephen Warren PMUX_PINGRP_PH2, 85d68c9429SStephen Warren PMUX_PINGRP_PH3, 86d68c9429SStephen Warren PMUX_PINGRP_PH4, 87d68c9429SStephen Warren PMUX_PINGRP_PH5, 88d68c9429SStephen Warren PMUX_PINGRP_PH6, 89d68c9429SStephen Warren PMUX_PINGRP_PH7, 90d68c9429SStephen Warren PMUX_PINGRP_PJ7, 91d68c9429SStephen Warren PMUX_PINGRP_PB0, 92d68c9429SStephen Warren PMUX_PINGRP_PB1, 93d68c9429SStephen Warren PMUX_PINGRP_PK7, 94d68c9429SStephen Warren PMUX_PINGRP_PI0, 95d68c9429SStephen Warren PMUX_PINGRP_PI1, 96d68c9429SStephen Warren PMUX_PINGRP_PI2, 97d68c9429SStephen Warren PMUX_PINGRP_PI4, 98d68c9429SStephen Warren PMUX_PINGRP_GEN2_I2C_SCL_PT5, 99d68c9429SStephen Warren PMUX_PINGRP_GEN2_I2C_SDA_PT6, 100d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_CLK_PCC4, 101d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_CMD_PT7, 102d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT0_PAA0, 103d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT1_PAA1, 104d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT2_PAA2, 105d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT3_PAA3, 106d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT4_PAA4, 107d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT5_PAA5, 108d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT6_PAA6, 109d68c9429SStephen Warren PMUX_PINGRP_SDMMC4_DAT7_PAA7, 110d68c9429SStephen Warren PMUX_PINGRP_CAM_MCLK_PCC0 = (0x284 / 4), 111d68c9429SStephen Warren PMUX_PINGRP_PCC1, 112d68c9429SStephen Warren PMUX_PINGRP_PBB0, 113d68c9429SStephen Warren PMUX_PINGRP_CAM_I2C_SCL_PBB1, 114d68c9429SStephen Warren PMUX_PINGRP_CAM_I2C_SDA_PBB2, 115d68c9429SStephen Warren PMUX_PINGRP_PBB3, 116d68c9429SStephen Warren PMUX_PINGRP_PBB4, 117d68c9429SStephen Warren PMUX_PINGRP_PBB5, 118d68c9429SStephen Warren PMUX_PINGRP_PBB6, 119d68c9429SStephen Warren PMUX_PINGRP_PBB7, 120d68c9429SStephen Warren PMUX_PINGRP_PCC2, 121d68c9429SStephen Warren PMUX_PINGRP_JTAG_RTCK, 122d68c9429SStephen Warren PMUX_PINGRP_PWR_I2C_SCL_PZ6, 123d68c9429SStephen Warren PMUX_PINGRP_PWR_I2C_SDA_PZ7, 124d68c9429SStephen Warren PMUX_PINGRP_KB_ROW0_PR0, 125d68c9429SStephen Warren PMUX_PINGRP_KB_ROW1_PR1, 126d68c9429SStephen Warren PMUX_PINGRP_KB_ROW2_PR2, 127d68c9429SStephen Warren PMUX_PINGRP_KB_ROW3_PR3, 128d68c9429SStephen Warren PMUX_PINGRP_KB_ROW4_PR4, 129d68c9429SStephen Warren PMUX_PINGRP_KB_ROW5_PR5, 130d68c9429SStephen Warren PMUX_PINGRP_KB_ROW6_PR6, 131d68c9429SStephen Warren PMUX_PINGRP_KB_ROW7_PR7, 132d68c9429SStephen Warren PMUX_PINGRP_KB_ROW8_PS0, 133d68c9429SStephen Warren PMUX_PINGRP_KB_ROW9_PS1, 134d68c9429SStephen Warren PMUX_PINGRP_KB_ROW10_PS2, 135d68c9429SStephen Warren PMUX_PINGRP_KB_ROW11_PS3, 136d68c9429SStephen Warren PMUX_PINGRP_KB_ROW12_PS4, 137d68c9429SStephen Warren PMUX_PINGRP_KB_ROW13_PS5, 138d68c9429SStephen Warren PMUX_PINGRP_KB_ROW14_PS6, 139d68c9429SStephen Warren PMUX_PINGRP_KB_ROW15_PS7, 140d68c9429SStephen Warren PMUX_PINGRP_KB_COL0_PQ0, 141d68c9429SStephen Warren PMUX_PINGRP_KB_COL1_PQ1, 142d68c9429SStephen Warren PMUX_PINGRP_KB_COL2_PQ2, 143d68c9429SStephen Warren PMUX_PINGRP_KB_COL3_PQ3, 144d68c9429SStephen Warren PMUX_PINGRP_KB_COL4_PQ4, 145d68c9429SStephen Warren PMUX_PINGRP_KB_COL5_PQ5, 146d68c9429SStephen Warren PMUX_PINGRP_KB_COL6_PQ6, 147d68c9429SStephen Warren PMUX_PINGRP_KB_COL7_PQ7, 148d68c9429SStephen Warren PMUX_PINGRP_CLK_32K_OUT_PA0, 149d68c9429SStephen Warren PMUX_PINGRP_CORE_PWR_REQ = (0x324 / 4), 150d68c9429SStephen Warren PMUX_PINGRP_CPU_PWR_REQ, 151d68c9429SStephen Warren PMUX_PINGRP_PWR_INT_N, 152d68c9429SStephen Warren PMUX_PINGRP_CLK_32K_IN, 153d68c9429SStephen Warren PMUX_PINGRP_OWR, 154d68c9429SStephen Warren PMUX_PINGRP_DAP1_FS_PN0, 155d68c9429SStephen Warren PMUX_PINGRP_DAP1_DIN_PN1, 156d68c9429SStephen Warren PMUX_PINGRP_DAP1_DOUT_PN2, 157d68c9429SStephen Warren PMUX_PINGRP_DAP1_SCLK_PN3, 158d68c9429SStephen Warren PMUX_PINGRP_DAP_MCLK1_REQ_PEE2, 159d68c9429SStephen Warren PMUX_PINGRP_DAP_MCLK1_PW4, 160d68c9429SStephen Warren PMUX_PINGRP_SPDIF_IN_PK6, 161d68c9429SStephen Warren PMUX_PINGRP_SPDIF_OUT_PK5, 162d68c9429SStephen Warren PMUX_PINGRP_DAP2_FS_PA2, 163d68c9429SStephen Warren PMUX_PINGRP_DAP2_DIN_PA4, 164d68c9429SStephen Warren PMUX_PINGRP_DAP2_DOUT_PA5, 165d68c9429SStephen Warren PMUX_PINGRP_DAP2_SCLK_PA3, 166d68c9429SStephen Warren PMUX_PINGRP_DVFS_PWM_PX0, 167d68c9429SStephen Warren PMUX_PINGRP_GPIO_X1_AUD_PX1, 168d68c9429SStephen Warren PMUX_PINGRP_GPIO_X3_AUD_PX3, 169d68c9429SStephen Warren PMUX_PINGRP_DVFS_CLK_PX2, 170d68c9429SStephen Warren PMUX_PINGRP_GPIO_X4_AUD_PX4, 171d68c9429SStephen Warren PMUX_PINGRP_GPIO_X5_AUD_PX5, 172d68c9429SStephen Warren PMUX_PINGRP_GPIO_X6_AUD_PX6, 173d68c9429SStephen Warren PMUX_PINGRP_GPIO_X7_AUD_PX7, 174d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_CLK_PA6 = (0x390 / 4), 175d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_CMD_PA7, 176d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_DAT0_PB7, 177d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_DAT1_PB6, 178d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_DAT2_PB5, 179d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_DAT3_PB4, 180d68c9429SStephen Warren PMUX_PINGRP_PEX_L0_RST_N_PDD1 = (0x3bc / 4), 181d68c9429SStephen Warren PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2, 182d68c9429SStephen Warren PMUX_PINGRP_PEX_WAKE_N_PDD3, 183d68c9429SStephen Warren PMUX_PINGRP_PEX_L1_RST_N_PDD5 = (0x3cc / 4), 184d68c9429SStephen Warren PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6, 185d68c9429SStephen Warren PMUX_PINGRP_HDMI_CEC_PEE3 = (0x3e0 / 4), 186d68c9429SStephen Warren PMUX_PINGRP_SDMMC1_WP_N_PV3, 187d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_CD_N_PV2, 188d68c9429SStephen Warren PMUX_PINGRP_GPIO_W2_AUD_PW2, 189d68c9429SStephen Warren PMUX_PINGRP_GPIO_W3_AUD_PW3, 190d68c9429SStephen Warren PMUX_PINGRP_USB_VBUS_EN0_PN4, 191d68c9429SStephen Warren PMUX_PINGRP_USB_VBUS_EN1_PN5, 192d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5, 193d68c9429SStephen Warren PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4, 194d68c9429SStephen Warren PMUX_PINGRP_GMI_CLK_LB, 195d68c9429SStephen Warren PMUX_PINGRP_RESET_OUT_N, 196d68c9429SStephen Warren PMUX_PINGRP_KB_ROW16_PT0, 197d68c9429SStephen Warren PMUX_PINGRP_KB_ROW17_PT1, 198d68c9429SStephen Warren PMUX_PINGRP_USB_VBUS_EN2_PFF1, 199d68c9429SStephen Warren PMUX_PINGRP_PFF2, 200d68c9429SStephen Warren PMUX_PINGRP_DP_HPD_PFF0 = (0x430 / 4), 201dfb42fc9SStephen Warren PMUX_PINGRP_COUNT, 202999c6bafSTom Warren }; 203999c6bafSTom Warren 204dfb42fc9SStephen Warren enum pmux_drvgrp { 205d68c9429SStephen Warren PMUX_DRVGRP_AO1, 206d68c9429SStephen Warren PMUX_DRVGRP_AO2, 207d68c9429SStephen Warren PMUX_DRVGRP_AT1, 208d68c9429SStephen Warren PMUX_DRVGRP_AT2, 209d68c9429SStephen Warren PMUX_DRVGRP_AT3, 210d68c9429SStephen Warren PMUX_DRVGRP_AT4, 211d68c9429SStephen Warren PMUX_DRVGRP_AT5, 212d68c9429SStephen Warren PMUX_DRVGRP_CDEV1, 213d68c9429SStephen Warren PMUX_DRVGRP_CDEV2, 214d68c9429SStephen Warren PMUX_DRVGRP_DAP1 = (0x28 / 4), 215d68c9429SStephen Warren PMUX_DRVGRP_DAP2, 216d68c9429SStephen Warren PMUX_DRVGRP_DAP3, 217d68c9429SStephen Warren PMUX_DRVGRP_DAP4, 218d68c9429SStephen Warren PMUX_DRVGRP_DBG, 219d68c9429SStephen Warren PMUX_DRVGRP_SDIO3 = (0x48 / 4), 220d68c9429SStephen Warren PMUX_DRVGRP_SPI, 221d68c9429SStephen Warren PMUX_DRVGRP_UAA, 222d68c9429SStephen Warren PMUX_DRVGRP_UAB, 223d68c9429SStephen Warren PMUX_DRVGRP_UART2, 224d68c9429SStephen Warren PMUX_DRVGRP_UART3, 225d68c9429SStephen Warren PMUX_DRVGRP_SDIO1 = (0x84 / 4), 226d68c9429SStephen Warren PMUX_DRVGRP_DDC = (0x94 / 4), 227d68c9429SStephen Warren PMUX_DRVGRP_GMA, 228d68c9429SStephen Warren PMUX_DRVGRP_GME = (0xa8 / 4), 229d68c9429SStephen Warren PMUX_DRVGRP_GMF, 230d68c9429SStephen Warren PMUX_DRVGRP_GMG, 231d68c9429SStephen Warren PMUX_DRVGRP_GMH, 232d68c9429SStephen Warren PMUX_DRVGRP_OWR, 233d68c9429SStephen Warren PMUX_DRVGRP_UDA, 234d68c9429SStephen Warren PMUX_DRVGRP_GPV, 235d68c9429SStephen Warren PMUX_DRVGRP_DEV3, 236d68c9429SStephen Warren PMUX_DRVGRP_CEC = (0xd0 / 4), 237d68c9429SStephen Warren PMUX_DRVGRP_AT6 = (0x12c / 4), 238d68c9429SStephen Warren PMUX_DRVGRP_DAP5, 239d68c9429SStephen Warren PMUX_DRVGRP_USB_VBUS_EN, 240d68c9429SStephen Warren PMUX_DRVGRP_AO3 = (0x140 / 4), 241d68c9429SStephen Warren PMUX_DRVGRP_AO0 = (0x148 / 4), 242d68c9429SStephen Warren PMUX_DRVGRP_HV0, 243d68c9429SStephen Warren PMUX_DRVGRP_SDIO4 = (0x15c / 4), 244d68c9429SStephen Warren PMUX_DRVGRP_AO4, 245dfb42fc9SStephen Warren PMUX_DRVGRP_COUNT, 246999c6bafSTom Warren }; 247999c6bafSTom Warren 24889d94373SStephen Warren enum pmux_mipipadctrlgrp { 24989d94373SStephen Warren PMUX_MIPIPADCTRLGRP_DSI_B, 25089d94373SStephen Warren PMUX_MIPIPADCTRLGRP_COUNT, 25189d94373SStephen Warren }; 25289d94373SStephen Warren 253999c6bafSTom Warren enum pmux_func { 2544a68d343SStephen Warren PMUX_FUNC_DEFAULT, 255d68c9429SStephen Warren PMUX_FUNC_BLINK, 256d68c9429SStephen Warren PMUX_FUNC_CCLA, 257d68c9429SStephen Warren PMUX_FUNC_CEC, 258d68c9429SStephen Warren PMUX_FUNC_CLDVFS, 259d68c9429SStephen Warren PMUX_FUNC_CLK, 260d68c9429SStephen Warren PMUX_FUNC_CLK12, 261d68c9429SStephen Warren PMUX_FUNC_CPU, 26289d94373SStephen Warren PMUX_FUNC_CSI, 263d68c9429SStephen Warren PMUX_FUNC_DAP, 264999c6bafSTom Warren PMUX_FUNC_DAP1, 265999c6bafSTom Warren PMUX_FUNC_DAP2, 266999c6bafSTom Warren PMUX_FUNC_DEV3, 267d68c9429SStephen Warren PMUX_FUNC_DISPLAYA, 268d68c9429SStephen Warren PMUX_FUNC_DISPLAYA_ALT, 269d68c9429SStephen Warren PMUX_FUNC_DISPLAYB, 270d68c9429SStephen Warren PMUX_FUNC_DP, 27189d94373SStephen Warren PMUX_FUNC_DSI_B, 272999c6bafSTom Warren PMUX_FUNC_DTV, 273999c6bafSTom Warren PMUX_FUNC_EXTPERIPH1, 274999c6bafSTom Warren PMUX_FUNC_EXTPERIPH2, 275999c6bafSTom Warren PMUX_FUNC_EXTPERIPH3, 276d68c9429SStephen Warren PMUX_FUNC_GMI, 277999c6bafSTom Warren PMUX_FUNC_GMI_ALT, 278999c6bafSTom Warren PMUX_FUNC_HDA, 279999c6bafSTom Warren PMUX_FUNC_HSI, 280d68c9429SStephen Warren PMUX_FUNC_I2C1, 281d68c9429SStephen Warren PMUX_FUNC_I2C2, 282d68c9429SStephen Warren PMUX_FUNC_I2C3, 283999c6bafSTom Warren PMUX_FUNC_I2C4, 284999c6bafSTom Warren PMUX_FUNC_I2CPWR, 285999c6bafSTom Warren PMUX_FUNC_I2S0, 286999c6bafSTom Warren PMUX_FUNC_I2S1, 287999c6bafSTom Warren PMUX_FUNC_I2S2, 288999c6bafSTom Warren PMUX_FUNC_I2S3, 289999c6bafSTom Warren PMUX_FUNC_I2S4, 290d68c9429SStephen Warren PMUX_FUNC_IRDA, 291d68c9429SStephen Warren PMUX_FUNC_KBC, 292d68c9429SStephen Warren PMUX_FUNC_OWR, 293d68c9429SStephen Warren PMUX_FUNC_PE, 294d68c9429SStephen Warren PMUX_FUNC_PE0, 295d68c9429SStephen Warren PMUX_FUNC_PE1, 296d68c9429SStephen Warren PMUX_FUNC_PMI, 297999c6bafSTom Warren PMUX_FUNC_PWM0, 298999c6bafSTom Warren PMUX_FUNC_PWM1, 299999c6bafSTom Warren PMUX_FUNC_PWM2, 300999c6bafSTom Warren PMUX_FUNC_PWM3, 301d68c9429SStephen Warren PMUX_FUNC_PWRON, 302d68c9429SStephen Warren PMUX_FUNC_RESET_OUT_N, 303d68c9429SStephen Warren PMUX_FUNC_RTCK, 304999c6bafSTom Warren PMUX_FUNC_SATA, 305d68c9429SStephen Warren PMUX_FUNC_SDMMC1, 306d68c9429SStephen Warren PMUX_FUNC_SDMMC2, 307d68c9429SStephen Warren PMUX_FUNC_SDMMC3, 308d68c9429SStephen Warren PMUX_FUNC_SDMMC4, 309d68c9429SStephen Warren PMUX_FUNC_SOC, 310d68c9429SStephen Warren PMUX_FUNC_SPDIF, 311d68c9429SStephen Warren PMUX_FUNC_SPI1, 312d68c9429SStephen Warren PMUX_FUNC_SPI2, 313d68c9429SStephen Warren PMUX_FUNC_SPI3, 314d68c9429SStephen Warren PMUX_FUNC_SPI4, 315999c6bafSTom Warren PMUX_FUNC_SPI5, 316999c6bafSTom Warren PMUX_FUNC_SPI6, 317d68c9429SStephen Warren PMUX_FUNC_SYS, 318d68c9429SStephen Warren PMUX_FUNC_TMDS, 319d68c9429SStephen Warren PMUX_FUNC_TRACE, 320d68c9429SStephen Warren PMUX_FUNC_UARTA, 321d68c9429SStephen Warren PMUX_FUNC_UARTB, 322d68c9429SStephen Warren PMUX_FUNC_UARTC, 323d68c9429SStephen Warren PMUX_FUNC_UARTD, 324d68c9429SStephen Warren PMUX_FUNC_ULPI, 325d68c9429SStephen Warren PMUX_FUNC_USB, 326999c6bafSTom Warren PMUX_FUNC_VGP1, 327999c6bafSTom Warren PMUX_FUNC_VGP2, 328999c6bafSTom Warren PMUX_FUNC_VGP3, 329999c6bafSTom Warren PMUX_FUNC_VGP4, 330999c6bafSTom Warren PMUX_FUNC_VGP5, 331999c6bafSTom Warren PMUX_FUNC_VGP6, 332d68c9429SStephen Warren PMUX_FUNC_VI, 333d68c9429SStephen Warren PMUX_FUNC_VI_ALT1, 334d68c9429SStephen Warren PMUX_FUNC_VI_ALT3, 335d68c9429SStephen Warren PMUX_FUNC_VIMCLK2, 336d68c9429SStephen Warren PMUX_FUNC_VIMCLK2_ALT, 337d381294aSStephen Warren PMUX_FUNC_RSVD1, 338d381294aSStephen Warren PMUX_FUNC_RSVD2, 339d381294aSStephen Warren PMUX_FUNC_RSVD3, 340d381294aSStephen Warren PMUX_FUNC_RSVD4, 341e2969957SStephen Warren PMUX_FUNC_COUNT, 342999c6bafSTom Warren }; 343999c6bafSTom Warren 344790f7719SStephen Warren #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 34589d94373SStephen Warren #define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820 3467a28441fSStephen Warren #define TEGRA_PMX_SOC_HAS_IO_CLAMPING 3477a28441fSStephen Warren #define TEGRA_PMX_SOC_HAS_DRVGRPS 34889d94373SStephen Warren #define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS 349439f5768SStephen Warren #define TEGRA_PMX_GRPS_HAVE_LPMD 350439f5768SStephen Warren #define TEGRA_PMX_GRPS_HAVE_SCHMT 351439f5768SStephen Warren #define TEGRA_PMX_GRPS_HAVE_HSM 3527a28441fSStephen Warren #define TEGRA_PMX_PINS_HAVE_E_INPUT 3537a28441fSStephen Warren #define TEGRA_PMX_PINS_HAVE_LOCK 3547a28441fSStephen Warren #define TEGRA_PMX_PINS_HAVE_OD 3557a28441fSStephen Warren #define TEGRA_PMX_PINS_HAVE_IO_RESET 3567a28441fSStephen Warren #define TEGRA_PMX_PINS_HAVE_RCV_SEL 357e2969957SStephen Warren #include <asm/arch-tegra/pinmux.h> 358999c6bafSTom Warren 359999c6bafSTom Warren #endif /* _TEGRA124_PINMUX_H_ */ 360