1*999c6bafSTom Warren /* 2*999c6bafSTom Warren * (C) Copyright 2013 3*999c6bafSTom Warren * NVIDIA Corporation <www.nvidia.com> 4*999c6bafSTom Warren * 5*999c6bafSTom Warren * SPDX-License-Identifier: GPL-2.0+ 6*999c6bafSTom Warren */ 7*999c6bafSTom Warren 8*999c6bafSTom Warren /* Tegra124 clock PLL tables */ 9*999c6bafSTom Warren 10*999c6bafSTom Warren #ifndef _TEGRA124_CLOCK_TABLES_H_ 11*999c6bafSTom Warren #define _TEGRA124_CLOCK_TABLES_H_ 12*999c6bafSTom Warren 13*999c6bafSTom Warren /* The PLLs supported by the hardware */ 14*999c6bafSTom Warren enum clock_id { 15*999c6bafSTom Warren CLOCK_ID_FIRST, 16*999c6bafSTom Warren CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, 17*999c6bafSTom Warren CLOCK_ID_MEMORY, 18*999c6bafSTom Warren CLOCK_ID_PERIPH, 19*999c6bafSTom Warren CLOCK_ID_AUDIO, 20*999c6bafSTom Warren CLOCK_ID_USB, 21*999c6bafSTom Warren CLOCK_ID_DISPLAY, 22*999c6bafSTom Warren 23*999c6bafSTom Warren /* now the simple ones */ 24*999c6bafSTom Warren CLOCK_ID_FIRST_SIMPLE, 25*999c6bafSTom Warren CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, 26*999c6bafSTom Warren CLOCK_ID_EPCI, 27*999c6bafSTom Warren CLOCK_ID_SFROM32KHZ, 28*999c6bafSTom Warren 29*999c6bafSTom Warren /* These are the base clocks (inputs to the Tegra SoC) */ 30*999c6bafSTom Warren CLOCK_ID_32KHZ, 31*999c6bafSTom Warren CLOCK_ID_OSC, 32*999c6bafSTom Warren 33*999c6bafSTom Warren CLOCK_ID_COUNT, /* number of PLLs */ 34*999c6bafSTom Warren 35*999c6bafSTom Warren /* 36*999c6bafSTom Warren * These are clock IDs that are used in table clock_source[][] 37*999c6bafSTom Warren * but will not be assigned as a clock source for any peripheral. 38*999c6bafSTom Warren */ 39*999c6bafSTom Warren CLOCK_ID_DISPLAY2, 40*999c6bafSTom Warren CLOCK_ID_CGENERAL2, 41*999c6bafSTom Warren CLOCK_ID_CGENERAL3, 42*999c6bafSTom Warren CLOCK_ID_MEMORY2, 43*999c6bafSTom Warren CLOCK_ID_SRC2, 44*999c6bafSTom Warren 45*999c6bafSTom Warren CLOCK_ID_NONE = -1, 46*999c6bafSTom Warren }; 47*999c6bafSTom Warren 48*999c6bafSTom Warren /* The clocks supported by the hardware */ 49*999c6bafSTom Warren enum periph_id { 50*999c6bafSTom Warren PERIPH_ID_FIRST, 51*999c6bafSTom Warren 52*999c6bafSTom Warren /* Low word: 31:0 (DEVICES_L) */ 53*999c6bafSTom Warren PERIPH_ID_CPU = PERIPH_ID_FIRST, 54*999c6bafSTom Warren PERIPH_ID_COP, 55*999c6bafSTom Warren PERIPH_ID_TRIGSYS, 56*999c6bafSTom Warren PERIPH_ID_ISPB, 57*999c6bafSTom Warren PERIPH_ID_RESERVED4, 58*999c6bafSTom Warren PERIPH_ID_TMR, 59*999c6bafSTom Warren PERIPH_ID_UART1, 60*999c6bafSTom Warren PERIPH_ID_UART2, 61*999c6bafSTom Warren 62*999c6bafSTom Warren /* 8 */ 63*999c6bafSTom Warren PERIPH_ID_GPIO, 64*999c6bafSTom Warren PERIPH_ID_SDMMC2, 65*999c6bafSTom Warren PERIPH_ID_SPDIF, 66*999c6bafSTom Warren PERIPH_ID_I2S1, 67*999c6bafSTom Warren PERIPH_ID_I2C1, 68*999c6bafSTom Warren PERIPH_ID_RESERVED13, 69*999c6bafSTom Warren PERIPH_ID_SDMMC1, 70*999c6bafSTom Warren PERIPH_ID_SDMMC4, 71*999c6bafSTom Warren 72*999c6bafSTom Warren /* 16 */ 73*999c6bafSTom Warren PERIPH_ID_TCW, 74*999c6bafSTom Warren PERIPH_ID_PWM, 75*999c6bafSTom Warren PERIPH_ID_I2S2, 76*999c6bafSTom Warren PERIPH_ID_RESERVED19, 77*999c6bafSTom Warren PERIPH_ID_VI, 78*999c6bafSTom Warren PERIPH_ID_RESERVED21, 79*999c6bafSTom Warren PERIPH_ID_USBD, 80*999c6bafSTom Warren PERIPH_ID_ISP, 81*999c6bafSTom Warren 82*999c6bafSTom Warren /* 24 */ 83*999c6bafSTom Warren PERIPH_ID_RESERVED24, 84*999c6bafSTom Warren PERIPH_ID_RESERVED25, 85*999c6bafSTom Warren PERIPH_ID_DISP2, 86*999c6bafSTom Warren PERIPH_ID_DISP1, 87*999c6bafSTom Warren PERIPH_ID_HOST1X, 88*999c6bafSTom Warren PERIPH_ID_VCP, 89*999c6bafSTom Warren PERIPH_ID_I2S0, 90*999c6bafSTom Warren PERIPH_ID_CACHE2, 91*999c6bafSTom Warren 92*999c6bafSTom Warren /* Middle word: 63:32 (DEVICES_H) */ 93*999c6bafSTom Warren PERIPH_ID_MEM, 94*999c6bafSTom Warren PERIPH_ID_AHBDMA, 95*999c6bafSTom Warren PERIPH_ID_APBDMA, 96*999c6bafSTom Warren PERIPH_ID_RESERVED35, 97*999c6bafSTom Warren PERIPH_ID_RESERVED36, 98*999c6bafSTom Warren PERIPH_ID_STAT_MON, 99*999c6bafSTom Warren PERIPH_ID_RESERVED38, 100*999c6bafSTom Warren PERIPH_ID_FUSE, 101*999c6bafSTom Warren 102*999c6bafSTom Warren /* 40 */ 103*999c6bafSTom Warren PERIPH_ID_KFUSE, 104*999c6bafSTom Warren PERIPH_ID_SBC1, 105*999c6bafSTom Warren PERIPH_ID_SNOR, 106*999c6bafSTom Warren PERIPH_ID_RESERVED43, 107*999c6bafSTom Warren PERIPH_ID_SBC2, 108*999c6bafSTom Warren PERIPH_ID_XIO, 109*999c6bafSTom Warren PERIPH_ID_SBC3, 110*999c6bafSTom Warren PERIPH_ID_I2C5, 111*999c6bafSTom Warren 112*999c6bafSTom Warren /* 48 */ 113*999c6bafSTom Warren PERIPH_ID_DSI, 114*999c6bafSTom Warren PERIPH_ID_RESERVED49, 115*999c6bafSTom Warren PERIPH_ID_HSI, 116*999c6bafSTom Warren PERIPH_ID_HDMI, 117*999c6bafSTom Warren PERIPH_ID_CSI, 118*999c6bafSTom Warren PERIPH_ID_RESERVED53, 119*999c6bafSTom Warren PERIPH_ID_I2C2, 120*999c6bafSTom Warren PERIPH_ID_UART3, 121*999c6bafSTom Warren 122*999c6bafSTom Warren /* 56 */ 123*999c6bafSTom Warren PERIPH_ID_MIPI_CAL, 124*999c6bafSTom Warren PERIPH_ID_EMC, 125*999c6bafSTom Warren PERIPH_ID_USB2, 126*999c6bafSTom Warren PERIPH_ID_USB3, 127*999c6bafSTom Warren PERIPH_ID_RESERVED60, 128*999c6bafSTom Warren PERIPH_ID_VDE, 129*999c6bafSTom Warren PERIPH_ID_BSEA, 130*999c6bafSTom Warren PERIPH_ID_BSEV, 131*999c6bafSTom Warren 132*999c6bafSTom Warren /* Upper word 95:64 (DEVICES_U) */ 133*999c6bafSTom Warren PERIPH_ID_RESERVED64, 134*999c6bafSTom Warren PERIPH_ID_UART4, 135*999c6bafSTom Warren PERIPH_ID_UART5, 136*999c6bafSTom Warren PERIPH_ID_I2C3, 137*999c6bafSTom Warren PERIPH_ID_SBC4, 138*999c6bafSTom Warren PERIPH_ID_SDMMC3, 139*999c6bafSTom Warren PERIPH_ID_PCIE, 140*999c6bafSTom Warren PERIPH_ID_OWR, 141*999c6bafSTom Warren 142*999c6bafSTom Warren /* 72 */ 143*999c6bafSTom Warren PERIPH_ID_AFI, 144*999c6bafSTom Warren PERIPH_ID_CORESIGHT, 145*999c6bafSTom Warren PERIPH_ID_PCIEXCLK, 146*999c6bafSTom Warren PERIPH_ID_AVPUCQ, 147*999c6bafSTom Warren PERIPH_ID_LA, 148*999c6bafSTom Warren PERIPH_ID_TRACECLKIN, 149*999c6bafSTom Warren PERIPH_ID_SOC_THERM, 150*999c6bafSTom Warren PERIPH_ID_DTV, 151*999c6bafSTom Warren 152*999c6bafSTom Warren /* 80 */ 153*999c6bafSTom Warren PERIPH_ID_RESERVED80, 154*999c6bafSTom Warren PERIPH_ID_I2CSLOW, 155*999c6bafSTom Warren PERIPH_ID_DSIB, 156*999c6bafSTom Warren PERIPH_ID_TSEC, 157*999c6bafSTom Warren PERIPH_ID_RESERVED84, 158*999c6bafSTom Warren PERIPH_ID_RESERVED85, 159*999c6bafSTom Warren PERIPH_ID_RESERVED86, 160*999c6bafSTom Warren PERIPH_ID_EMUCIF, 161*999c6bafSTom Warren 162*999c6bafSTom Warren /* 88 */ 163*999c6bafSTom Warren PERIPH_ID_RESERVED88, 164*999c6bafSTom Warren PERIPH_ID_XUSB_HOST, 165*999c6bafSTom Warren PERIPH_ID_RESERVED90, 166*999c6bafSTom Warren PERIPH_ID_MSENC, 167*999c6bafSTom Warren PERIPH_ID_RESERVED92, 168*999c6bafSTom Warren PERIPH_ID_RESERVED93, 169*999c6bafSTom Warren PERIPH_ID_RESERVED94, 170*999c6bafSTom Warren PERIPH_ID_XUSB_DEV, 171*999c6bafSTom Warren 172*999c6bafSTom Warren PERIPH_ID_VW_FIRST, 173*999c6bafSTom Warren /* V word: 31:0 */ 174*999c6bafSTom Warren PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST, 175*999c6bafSTom Warren PERIPH_ID_CPULP, 176*999c6bafSTom Warren PERIPH_ID_V_RESERVED2, 177*999c6bafSTom Warren PERIPH_ID_MSELECT, 178*999c6bafSTom Warren PERIPH_ID_V_RESERVED4, 179*999c6bafSTom Warren PERIPH_ID_I2S3, 180*999c6bafSTom Warren PERIPH_ID_I2S4, 181*999c6bafSTom Warren PERIPH_ID_I2C4, 182*999c6bafSTom Warren 183*999c6bafSTom Warren /* 104 */ 184*999c6bafSTom Warren PERIPH_ID_SBC5, 185*999c6bafSTom Warren PERIPH_ID_SBC6, 186*999c6bafSTom Warren PERIPH_ID_AUDIO, 187*999c6bafSTom Warren PERIPH_ID_APBIF, 188*999c6bafSTom Warren PERIPH_ID_DAM0, 189*999c6bafSTom Warren PERIPH_ID_DAM1, 190*999c6bafSTom Warren PERIPH_ID_DAM2, 191*999c6bafSTom Warren PERIPH_ID_HDA2CODEC2X, 192*999c6bafSTom Warren 193*999c6bafSTom Warren /* 112 */ 194*999c6bafSTom Warren PERIPH_ID_ATOMICS, 195*999c6bafSTom Warren PERIPH_ID_V_RESERVED17, 196*999c6bafSTom Warren PERIPH_ID_V_RESERVED18, 197*999c6bafSTom Warren PERIPH_ID_V_RESERVED19, 198*999c6bafSTom Warren PERIPH_ID_V_RESERVED20, 199*999c6bafSTom Warren PERIPH_ID_V_RESERVED21, 200*999c6bafSTom Warren PERIPH_ID_V_RESERVED22, 201*999c6bafSTom Warren PERIPH_ID_ACTMON, 202*999c6bafSTom Warren 203*999c6bafSTom Warren /* 120 */ 204*999c6bafSTom Warren PERIPH_ID_EXTPERIPH1, 205*999c6bafSTom Warren PERIPH_ID_EXTPERIPH2, 206*999c6bafSTom Warren PERIPH_ID_EXTPERIPH3, 207*999c6bafSTom Warren PERIPH_ID_OOB, 208*999c6bafSTom Warren PERIPH_ID_SATA, 209*999c6bafSTom Warren PERIPH_ID_HDA, 210*999c6bafSTom Warren PERIPH_ID_V_RESERVED30, 211*999c6bafSTom Warren PERIPH_ID_V_RESERVED31, 212*999c6bafSTom Warren 213*999c6bafSTom Warren /* W word: 31:0 */ 214*999c6bafSTom Warren PERIPH_ID_HDA2HDMICODEC, 215*999c6bafSTom Warren PERIPH_ID_SATACOLD, 216*999c6bafSTom Warren PERIPH_ID_W_RESERVED2, 217*999c6bafSTom Warren PERIPH_ID_W_RESERVED3, 218*999c6bafSTom Warren PERIPH_ID_W_RESERVED4, 219*999c6bafSTom Warren PERIPH_ID_W_RESERVED5, 220*999c6bafSTom Warren PERIPH_ID_W_RESERVED6, 221*999c6bafSTom Warren PERIPH_ID_W_RESERVED7, 222*999c6bafSTom Warren 223*999c6bafSTom Warren /* 136 */ 224*999c6bafSTom Warren PERIPH_ID_CEC, 225*999c6bafSTom Warren PERIPH_ID_W_RESERVED9, 226*999c6bafSTom Warren PERIPH_ID_W_RESERVED10, 227*999c6bafSTom Warren PERIPH_ID_W_RESERVED11, 228*999c6bafSTom Warren PERIPH_ID_W_RESERVED12, 229*999c6bafSTom Warren PERIPH_ID_W_RESERVED13, 230*999c6bafSTom Warren PERIPH_ID_XUSB_PADCTL, 231*999c6bafSTom Warren PERIPH_ID_W_RESERVED15, 232*999c6bafSTom Warren 233*999c6bafSTom Warren /* 144 */ 234*999c6bafSTom Warren PERIPH_ID_W_RESERVED16, 235*999c6bafSTom Warren PERIPH_ID_W_RESERVED17, 236*999c6bafSTom Warren PERIPH_ID_W_RESERVED18, 237*999c6bafSTom Warren PERIPH_ID_W_RESERVED19, 238*999c6bafSTom Warren PERIPH_ID_W_RESERVED20, 239*999c6bafSTom Warren PERIPH_ID_ENTROPY, 240*999c6bafSTom Warren PERIPH_ID_DDS, 241*999c6bafSTom Warren PERIPH_ID_W_RESERVED23, 242*999c6bafSTom Warren 243*999c6bafSTom Warren /* 152 */ 244*999c6bafSTom Warren PERIPH_ID_DP2, 245*999c6bafSTom Warren PERIPH_ID_AMX0, 246*999c6bafSTom Warren PERIPH_ID_ADX0, 247*999c6bafSTom Warren PERIPH_ID_DVFS, 248*999c6bafSTom Warren PERIPH_ID_XUSB_SS, 249*999c6bafSTom Warren PERIPH_ID_W_RESERVED29, 250*999c6bafSTom Warren PERIPH_ID_W_RESERVED30, 251*999c6bafSTom Warren PERIPH_ID_W_RESERVED31, 252*999c6bafSTom Warren 253*999c6bafSTom Warren PERIPH_ID_X_FIRST, 254*999c6bafSTom Warren /* X word: 31:0 */ 255*999c6bafSTom Warren PERIPH_ID_SPARE = PERIPH_ID_X_FIRST, 256*999c6bafSTom Warren PERIPH_ID_X_RESERVED1, 257*999c6bafSTom Warren PERIPH_ID_X_RESERVED2, 258*999c6bafSTom Warren PERIPH_ID_X_RESERVED3, 259*999c6bafSTom Warren PERIPH_ID_CAM_MCLK, 260*999c6bafSTom Warren PERIPH_ID_CAM_MCLK2, 261*999c6bafSTom Warren PERIPH_ID_I2C6, 262*999c6bafSTom Warren PERIPH_ID_X_RESERVED7, 263*999c6bafSTom Warren 264*999c6bafSTom Warren /* 168 */ 265*999c6bafSTom Warren PERIPH_ID_X_RESERVED8, 266*999c6bafSTom Warren PERIPH_ID_X_RESERVED9, 267*999c6bafSTom Warren PERIPH_ID_X_RESERVED10, 268*999c6bafSTom Warren PERIPH_ID_VIM2_CLK, 269*999c6bafSTom Warren PERIPH_ID_X_RESERVED12, 270*999c6bafSTom Warren PERIPH_ID_X_RESERVED13, 271*999c6bafSTom Warren PERIPH_ID_EMC_DLL, 272*999c6bafSTom Warren PERIPH_ID_X_RESERVED15, 273*999c6bafSTom Warren 274*999c6bafSTom Warren /* 176 */ 275*999c6bafSTom Warren PERIPH_ID_HDMI_AUDIO, 276*999c6bafSTom Warren PERIPH_ID_CLK72MHZ, 277*999c6bafSTom Warren PERIPH_ID_VIC, 278*999c6bafSTom Warren PERIPH_ID_X_RESERVED19, 279*999c6bafSTom Warren PERIPH_ID_ADX1, 280*999c6bafSTom Warren PERIPH_ID_DPAUX, 281*999c6bafSTom Warren PERIPH_ID_SOR0, 282*999c6bafSTom Warren PERIPH_ID_X_RESERVED23, 283*999c6bafSTom Warren 284*999c6bafSTom Warren /* 184 */ 285*999c6bafSTom Warren PERIPH_ID_GPU, 286*999c6bafSTom Warren PERIPH_ID_AMX1, 287*999c6bafSTom Warren PERIPH_ID_X_RESERVED26, 288*999c6bafSTom Warren PERIPH_ID_X_RESERVED27, 289*999c6bafSTom Warren PERIPH_ID_X_RESERVED28, 290*999c6bafSTom Warren PERIPH_ID_X_RESERVED29, 291*999c6bafSTom Warren PERIPH_ID_X_RESERVED30, 292*999c6bafSTom Warren PERIPH_ID_X_RESERVED31, 293*999c6bafSTom Warren 294*999c6bafSTom Warren PERIPH_ID_COUNT, 295*999c6bafSTom Warren PERIPH_ID_NONE = -1, 296*999c6bafSTom Warren }; 297*999c6bafSTom Warren 298*999c6bafSTom Warren enum pll_out_id { 299*999c6bafSTom Warren PLL_OUT1, 300*999c6bafSTom Warren PLL_OUT2, 301*999c6bafSTom Warren PLL_OUT3, 302*999c6bafSTom Warren PLL_OUT4 303*999c6bafSTom Warren }; 304*999c6bafSTom Warren 305*999c6bafSTom Warren /* 306*999c6bafSTom Warren * Clock peripheral IDs which sadly don't match up with PERIPH_ID. we want 307*999c6bafSTom Warren * callers to use the PERIPH_ID for all access to peripheral clocks to avoid 308*999c6bafSTom Warren * confusion bewteen PERIPH_ID_... and PERIPHC_... 309*999c6bafSTom Warren * 310*999c6bafSTom Warren * We don't call this CLOCK_PERIPH_ID or PERIPH_CLOCK_ID as it would just be 311*999c6bafSTom Warren * confusing. 312*999c6bafSTom Warren */ 313*999c6bafSTom Warren enum periphc_internal_id { 314*999c6bafSTom Warren /* 0x00 */ 315*999c6bafSTom Warren PERIPHC_I2S1, 316*999c6bafSTom Warren PERIPHC_I2S2, 317*999c6bafSTom Warren PERIPHC_SPDIF_OUT, 318*999c6bafSTom Warren PERIPHC_SPDIF_IN, 319*999c6bafSTom Warren PERIPHC_PWM, 320*999c6bafSTom Warren PERIPHC_05h, 321*999c6bafSTom Warren PERIPHC_SBC2, 322*999c6bafSTom Warren PERIPHC_SBC3, 323*999c6bafSTom Warren 324*999c6bafSTom Warren /* 0x08 */ 325*999c6bafSTom Warren PERIPHC_08h, 326*999c6bafSTom Warren PERIPHC_I2C1, 327*999c6bafSTom Warren PERIPHC_I2C5, 328*999c6bafSTom Warren PERIPHC_0bh, 329*999c6bafSTom Warren PERIPHC_0ch, 330*999c6bafSTom Warren PERIPHC_SBC1, 331*999c6bafSTom Warren PERIPHC_DISP1, 332*999c6bafSTom Warren PERIPHC_DISP2, 333*999c6bafSTom Warren 334*999c6bafSTom Warren /* 0x10 */ 335*999c6bafSTom Warren PERIPHC_10h, 336*999c6bafSTom Warren PERIPHC_11h, 337*999c6bafSTom Warren PERIPHC_VI, 338*999c6bafSTom Warren PERIPHC_13h, 339*999c6bafSTom Warren PERIPHC_SDMMC1, 340*999c6bafSTom Warren PERIPHC_SDMMC2, 341*999c6bafSTom Warren PERIPHC_G3D, 342*999c6bafSTom Warren PERIPHC_G2D, 343*999c6bafSTom Warren 344*999c6bafSTom Warren /* 0x18 */ 345*999c6bafSTom Warren PERIPHC_18h, 346*999c6bafSTom Warren PERIPHC_SDMMC4, 347*999c6bafSTom Warren PERIPHC_VFIR, 348*999c6bafSTom Warren PERIPHC_1Bh, 349*999c6bafSTom Warren PERIPHC_1Ch, 350*999c6bafSTom Warren PERIPHC_HSI, 351*999c6bafSTom Warren PERIPHC_UART1, 352*999c6bafSTom Warren PERIPHC_UART2, 353*999c6bafSTom Warren 354*999c6bafSTom Warren /* 0x20 */ 355*999c6bafSTom Warren PERIPHC_HOST1X, 356*999c6bafSTom Warren PERIPHC_21h, 357*999c6bafSTom Warren PERIPHC_22h, 358*999c6bafSTom Warren PERIPHC_HDMI, 359*999c6bafSTom Warren PERIPHC_24h, 360*999c6bafSTom Warren PERIPHC_25h, 361*999c6bafSTom Warren PERIPHC_I2C2, 362*999c6bafSTom Warren PERIPHC_EMC, 363*999c6bafSTom Warren 364*999c6bafSTom Warren /* 0x28 */ 365*999c6bafSTom Warren PERIPHC_UART3, 366*999c6bafSTom Warren PERIPHC_29h, 367*999c6bafSTom Warren PERIPHC_VI_SENSOR, 368*999c6bafSTom Warren PERIPHC_2bh, 369*999c6bafSTom Warren PERIPHC_2ch, 370*999c6bafSTom Warren PERIPHC_SBC4, 371*999c6bafSTom Warren PERIPHC_I2C3, 372*999c6bafSTom Warren PERIPHC_SDMMC3, 373*999c6bafSTom Warren 374*999c6bafSTom Warren /* 0x30 */ 375*999c6bafSTom Warren PERIPHC_UART4, 376*999c6bafSTom Warren PERIPHC_UART5, 377*999c6bafSTom Warren PERIPHC_VDE, 378*999c6bafSTom Warren PERIPHC_OWR, 379*999c6bafSTom Warren PERIPHC_NOR, 380*999c6bafSTom Warren PERIPHC_CSITE, 381*999c6bafSTom Warren PERIPHC_I2S0, 382*999c6bafSTom Warren PERIPHC_DTV, 383*999c6bafSTom Warren 384*999c6bafSTom Warren /* 0x38 */ 385*999c6bafSTom Warren PERIPHC_38h, 386*999c6bafSTom Warren PERIPHC_39h, 387*999c6bafSTom Warren PERIPHC_3ah, 388*999c6bafSTom Warren PERIPHC_3bh, 389*999c6bafSTom Warren PERIPHC_MSENC, 390*999c6bafSTom Warren PERIPHC_TSEC, 391*999c6bafSTom Warren PERIPHC_3eh, 392*999c6bafSTom Warren PERIPHC_OSC, 393*999c6bafSTom Warren 394*999c6bafSTom Warren PERIPHC_VW_FIRST, 395*999c6bafSTom Warren /* 0x40 */ 396*999c6bafSTom Warren PERIPHC_40h = PERIPHC_VW_FIRST, 397*999c6bafSTom Warren PERIPHC_MSELECT, 398*999c6bafSTom Warren PERIPHC_TSENSOR, 399*999c6bafSTom Warren PERIPHC_I2S3, 400*999c6bafSTom Warren PERIPHC_I2S4, 401*999c6bafSTom Warren PERIPHC_I2C4, 402*999c6bafSTom Warren PERIPHC_SBC5, 403*999c6bafSTom Warren PERIPHC_SBC6, 404*999c6bafSTom Warren 405*999c6bafSTom Warren /* 0x48 */ 406*999c6bafSTom Warren PERIPHC_AUDIO, 407*999c6bafSTom Warren PERIPHC_49h, 408*999c6bafSTom Warren PERIPHC_DAM0, 409*999c6bafSTom Warren PERIPHC_DAM1, 410*999c6bafSTom Warren PERIPHC_DAM2, 411*999c6bafSTom Warren PERIPHC_HDA2CODEC2X, 412*999c6bafSTom Warren PERIPHC_ACTMON, 413*999c6bafSTom Warren PERIPHC_EXTPERIPH1, 414*999c6bafSTom Warren 415*999c6bafSTom Warren /* 0x50 */ 416*999c6bafSTom Warren PERIPHC_EXTPERIPH2, 417*999c6bafSTom Warren PERIPHC_EXTPERIPH3, 418*999c6bafSTom Warren PERIPHC_52h, 419*999c6bafSTom Warren PERIPHC_I2CSLOW, 420*999c6bafSTom Warren PERIPHC_SYS, 421*999c6bafSTom Warren PERIPHC_55h, 422*999c6bafSTom Warren PERIPHC_56h, 423*999c6bafSTom Warren PERIPHC_57h, 424*999c6bafSTom Warren 425*999c6bafSTom Warren /* 0x58 */ 426*999c6bafSTom Warren PERIPHC_58h, 427*999c6bafSTom Warren PERIPHC_59h, 428*999c6bafSTom Warren PERIPHC_5ah, 429*999c6bafSTom Warren PERIPHC_5bh, 430*999c6bafSTom Warren PERIPHC_SATAOOB, 431*999c6bafSTom Warren PERIPHC_SATA, 432*999c6bafSTom Warren PERIPHC_HDA, /* 0x428 */ 433*999c6bafSTom Warren PERIPHC_5fh, 434*999c6bafSTom Warren 435*999c6bafSTom Warren PERIPHC_X_FIRST, 436*999c6bafSTom Warren /* 0x60 */ 437*999c6bafSTom Warren PERIPHC_XUSB_CORE_HOST = PERIPHC_X_FIRST, /* 0x600 */ 438*999c6bafSTom Warren PERIPHC_XUSB_FALCON, 439*999c6bafSTom Warren PERIPHC_XUSB_FS, 440*999c6bafSTom Warren PERIPHC_XUSB_CORE_DEV, 441*999c6bafSTom Warren PERIPHC_XUSB_SS, 442*999c6bafSTom Warren PERIPHC_CILAB, 443*999c6bafSTom Warren PERIPHC_CILCD, 444*999c6bafSTom Warren PERIPHC_CILE, 445*999c6bafSTom Warren 446*999c6bafSTom Warren /* 0x68 */ 447*999c6bafSTom Warren PERIPHC_DSIA_LP, 448*999c6bafSTom Warren PERIPHC_DSIB_LP, 449*999c6bafSTom Warren PERIPHC_ENTROPY, 450*999c6bafSTom Warren PERIPHC_DVFS_REF, 451*999c6bafSTom Warren PERIPHC_DVFS_SOC, 452*999c6bafSTom Warren PERIPHC_TRACECLKIN, 453*999c6bafSTom Warren PERIPHC_ADX0, 454*999c6bafSTom Warren PERIPHC_AMX0, 455*999c6bafSTom Warren 456*999c6bafSTom Warren /* 0x70 */ 457*999c6bafSTom Warren PERIPHC_EMC_LATENCY, 458*999c6bafSTom Warren PERIPHC_SOC_THERM, 459*999c6bafSTom Warren PERIPHC_72h, 460*999c6bafSTom Warren PERIPHC_73h, 461*999c6bafSTom Warren PERIPHC_74h, 462*999c6bafSTom Warren PERIPHC_75h, 463*999c6bafSTom Warren PERIPHC_VI_SENSOR2, 464*999c6bafSTom Warren PERIPHC_I2C6, 465*999c6bafSTom Warren 466*999c6bafSTom Warren /* 0x78 */ 467*999c6bafSTom Warren PERIPHC_78h, 468*999c6bafSTom Warren PERIPHC_EMC_DLL, 469*999c6bafSTom Warren PERIPHC_HDMI_AUDIO, 470*999c6bafSTom Warren PERIPHC_CLK72MHZ, 471*999c6bafSTom Warren PERIPHC_ADX1, 472*999c6bafSTom Warren PERIPHC_AMX1, 473*999c6bafSTom Warren PERIPHC_VIC, 474*999c6bafSTom Warren PERIPHC_7fh, 475*999c6bafSTom Warren 476*999c6bafSTom Warren PERIPHC_COUNT, 477*999c6bafSTom Warren 478*999c6bafSTom Warren PERIPHC_NONE = -1, 479*999c6bafSTom Warren }; 480*999c6bafSTom Warren 481*999c6bafSTom Warren /* Converts a clock number to a clock register: 0=L, 1=H, 2=U, 0=V, 1=W */ 482*999c6bafSTom Warren #define PERIPH_REG(id) \ 483*999c6bafSTom Warren (id < PERIPH_ID_VW_FIRST) ? \ 484*999c6bafSTom Warren ((id) >> 5) : ((id - PERIPH_ID_VW_FIRST) >> 5) 485*999c6bafSTom Warren 486*999c6bafSTom Warren /* Mask value for a clock (within PERIPH_REG(id)) */ 487*999c6bafSTom Warren #define PERIPH_MASK(id) (1 << ((id) & 0x1f)) 488*999c6bafSTom Warren 489*999c6bafSTom Warren /* return 1 if a PLL ID is in range */ 490*999c6bafSTom Warren #define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT) 491*999c6bafSTom Warren 492*999c6bafSTom Warren /* return 1 if a peripheral ID is in range */ 493*999c6bafSTom Warren #define clock_periph_id_isvalid(id) ((id) >= PERIPH_ID_FIRST && \ 494*999c6bafSTom Warren (id) < PERIPH_ID_COUNT) 495*999c6bafSTom Warren 496*999c6bafSTom Warren #endif /* _TEGRA124_CLOCK_TABLES_H_ */ 497