1 /* 2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _TEGRA114_H_ 8 #define _TEGRA114_H_ 9 10 #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ 11 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ 12 #define NV_PA_MC_BASE 0x70019000 13 14 #include <asm/arch-tegra/tegra.h> 15 16 #define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */ 17 18 #undef NVBOOTINFOTABLE_BCTSIZE 19 #undef NVBOOTINFOTABLE_BCTPTR 20 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ 21 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ 22 23 #define MAX_NUM_CPU 4 24 25 #endif /* TEGRA114_H */ 26