1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 4 */ 5 6 #ifndef _TEGRA114_H_ 7 #define _TEGRA114_H_ 8 9 #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ 10 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ 11 #define NV_PA_MC_BASE 0x70019000 12 13 #include <asm/arch-tegra/tegra.h> 14 15 #define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */ 16 17 #undef NVBOOTINFOTABLE_BCTSIZE 18 #undef NVBOOTINFOTABLE_BCTPTR 19 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ 20 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ 21 22 #define MAX_NUM_CPU 4 23 24 #endif /* TEGRA114_H */ 25