1 /* 2 * (C) Copyright 2010,2011 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef _UART_H_ 25 #define _UART_H_ 26 27 /* UART registers */ 28 struct uart_ctlr { 29 uint uart_thr_dlab_0; /* UART_THR_DLAB_0_0, offset 00 */ 30 uint uart_ier_dlab_0; /* UART_IER_DLAB_0_0, offset 04 */ 31 uint uart_iir_fcr; /* UART_IIR_FCR_0, offset 08 */ 32 uint uart_lcr; /* UART_LCR_0, offset 0C */ 33 uint uart_mcr; /* UART_MCR_0, offset 10 */ 34 uint uart_lsr; /* UART_LSR_0, offset 14 */ 35 uint uart_msr; /* UART_MSR_0, offset 18 */ 36 uint uart_spr; /* UART_SPR_0, offset 1C */ 37 uint uart_irda_csr; /* UART_IRDA_CSR_0, offset 20 */ 38 uint uart_reserved[6]; /* Reserved, unused, offset 24-38*/ 39 uint uart_asr; /* UART_ASR_0, offset 3C */ 40 }; 41 42 #define NVRM_PLLP_FIXED_FREQ_KHZ 216000 43 #define NV_DEFAULT_DEBUG_BAUD 115200 44 45 #define UART_FCR_TRIGGER_3 0x30 /* Mask for trigger set at 3 */ 46 47 #endif /* UART_H */ 48