1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef _TEGRA_GP_PADCTRL_H_ 25 #define _TEGRA_GP_PADCTRL_H_ 26 27 #define GP_HIDREV 0x804 28 29 /* bit fields definitions for APB_MISC_GP_HIDREV register */ 30 #define HIDREV_CHIPID_SHIFT 8 31 #define HIDREV_CHIPID_MASK (0xff << HIDREV_CHIPID_SHIFT) 32 #define HIDREV_MAJORPREV_SHIFT 4 33 #define HIDREV_MAJORPREV_MASK (0xf << HIDREV_MAJORPREV_SHIFT) 34 35 /* CHIPID field returned from APB_MISC_GP_HIDREV register */ 36 #define CHIPID_TEGRA20 0x20 37 #define CHIPID_TEGRA30 0x30 38 #define CHIPID_TEGRA114 0x35 39 40 #endif /* _TEGRA_GP_PADCTRL_H_ */ 41