1 /* 2 * (C) Copyright 2010-2015 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_GP_PADCTRL_H_ 9 #define _TEGRA_GP_PADCTRL_H_ 10 11 #define GP_HIDREV 0x804 12 13 /* bit fields definitions for APB_MISC_GP_HIDREV register */ 14 #define HIDREV_CHIPID_SHIFT 8 15 #define HIDREV_CHIPID_MASK (0xff << HIDREV_CHIPID_SHIFT) 16 #define HIDREV_MAJORPREV_SHIFT 4 17 #define HIDREV_MAJORPREV_MASK (0xf << HIDREV_MAJORPREV_SHIFT) 18 19 /* CHIPID field returned from APB_MISC_GP_HIDREV register */ 20 #define CHIPID_TEGRA20 0x20 21 #define CHIPID_TEGRA30 0x30 22 #define CHIPID_TEGRA114 0x35 23 #define CHIPID_TEGRA124 0x40 24 #define CHIPID_TEGRA210 0x21 25 26 #endif /* _TEGRA_GP_PADCTRL_H_ */ 27