192369844SChen-Yu Tsai /* 292369844SChen-Yu Tsai * (C) Copyright 2015 Chen-Yu Tsai <wens@csie.org> 392369844SChen-Yu Tsai * 492369844SChen-Yu Tsai * SPDX-License-Identifier: GPL-2.0+ 592369844SChen-Yu Tsai */ 692369844SChen-Yu Tsai 792369844SChen-Yu Tsai #ifndef _SUNXI_TZPC_H 892369844SChen-Yu Tsai #define _SUNXI_TZPC_H 992369844SChen-Yu Tsai 1092369844SChen-Yu Tsai #ifndef __ASSEMBLY__ 1192369844SChen-Yu Tsai struct sunxi_tzpc { 1292369844SChen-Yu Tsai u32 r0size; /* 0x00 Size of secure RAM region */ 1392369844SChen-Yu Tsai u32 decport0_status; /* 0x04 Status of decode protection port 0 */ 1492369844SChen-Yu Tsai u32 decport0_set; /* 0x08 Set decode protection port 0 */ 1592369844SChen-Yu Tsai u32 decport0_clear; /* 0x0c Clear decode protection port 0 */ 16*5823664fSChen-Yu Tsai /* For A80 and later SoCs */ 17*5823664fSChen-Yu Tsai u32 decport1_status; /* 0x10 Status of decode protection port 1 */ 18*5823664fSChen-Yu Tsai u32 decport1_set; /* 0x14 Set decode protection port 1 */ 19*5823664fSChen-Yu Tsai u32 decport1_clear; /* 0x18 Clear decode protection port 1 */ 20*5823664fSChen-Yu Tsai u32 decport2_status; /* 0x1c Status of decode protection port 2 */ 21*5823664fSChen-Yu Tsai u32 decport2_set; /* 0x20 Set decode protection port 2 */ 22*5823664fSChen-Yu Tsai u32 decport2_clear; /* 0x24 Clear decode protection port 2 */ 2392369844SChen-Yu Tsai }; 2492369844SChen-Yu Tsai #endif 2592369844SChen-Yu Tsai 26*5823664fSChen-Yu Tsai #define SUN6I_TZPC_DECPORT0_RTC (1 << 1) 27*5823664fSChen-Yu Tsai 28*5823664fSChen-Yu Tsai #define SUN8I_H3_TZPC_DECPORT0_ALL 0xbe 29*5823664fSChen-Yu Tsai #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff 30*5823664fSChen-Yu Tsai #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f 3192369844SChen-Yu Tsai 3292369844SChen-Yu Tsai void tzpc_init(void); 3392369844SChen-Yu Tsai 3492369844SChen-Yu Tsai #endif /* _SUNXI_TZPC_H */ 35