1 /*
2  * GTBUS initialisation for sun9i
3  *
4  * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH
5  *                    Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef _SUNXI_GTBUS_SUN9I_H
11 #define _SUNXI_GTBUS_SUN9I_H
12 
13 #include <linux/types.h>
14 
15 struct sunxi_gtbus_reg {
16 	u32 mst_cfg[36];           /* 0x000 */
17 	u8  reserved1[0x70];       /* 0x090 */
18 	u32 bw_wdw_cfg;            /* 0x100 */
19 	u32 mst_read_prio_cfg[2];  /* 0x104 */
20 	u32 lvl2_mst_cfg;          /* 0x10c */
21 	u32 sw_clk_on;             /* 0x110 */
22 	u32 sw_clk_off;            /* 0x114 */
23 	u32 pmu_mst_en;            /* 0x118 */
24 	u32 pmu_cfg;               /* 0x11c */
25 	u32 pmu_cnt[19];           /* 0x120 */
26 	u32 reserved2[0x94];       /* 0x16c */
27 	u32 cci400_config[3];      /* 0x200 */
28 	u32 cci400_status[2];      /* 0x20c */
29 };
30 
31 /* for register GT_MST_CFG_REG(n) */
32 #define GT_ENABLE_REQ           (1<<31) /* clock on */
33 #define GT_DISABLE_REQ          (1<<30) /* clock off */
34 #define GT_QOS_SHIFT            28
35 #define GT_THD1_SHIFT           16
36 #define GT_REQN_MAX             0xf /* max no master requests in one cycle */
37 #define GT_REQN_SHIFT           12
38 #define GT_THD0_SHIFT           0
39 
40 #define GT_QOS_MAX              0x3
41 #define GT_THD_MAX              0xfff
42 #define GT_BW_WDW_MAX           0xffff
43 
44 /* mst_read_prio_cfg */
45 #define GT_PRIO_LOW     0
46 #define GT_PRIO_HIGH    1
47 
48 /* GTBUS port ids */
49 #define GT_PORT_CPUM1   0
50 #define GT_PORT_CPUM2   1
51 #define GT_PORT_SATA    2
52 #define	GT_PORT_USB3    3
53 #define	GT_PORT_FE0     4
54 #define	GT_PORT_BE1     5
55 #define	GT_PORT_BE2     6
56 #define	GT_PORT_IEP0    7
57 #define	GT_PORT_FE1     8
58 #define	GT_PORT_BE0     9
59 #define	GT_PORT_FE2     10
60 #define	GT_PORT_IEP1    11
61 #define	GT_PORT_VED     12
62 #define	GT_PORT_VEE     13
63 #define	GT_PORT_FD      14
64 #define	GT_PORT_CSI     15
65 #define	GT_PORT_MP      16
66 #define	GT_PORT_HSI     17
67 #define	GT_PORT_SS      18
68 #define	GT_PORT_TS      19
69 #define	GT_PORT_DMA     20
70 #define	GT_PORT_NDFC0   21
71 #define	GT_PORT_NDFC1   22
72 #define	GT_PORT_CPUS    23
73 #define	GT_PORT_TH      24
74 #define	GT_PORT_GMAC    25
75 #define	GT_PORT_USB0    26
76 #define	GT_PORT_MSTG0   27
77 #define	GT_PORT_MSTG1   28
78 #define	GT_PORT_MSTG2   29
79 #define	GT_PORT_MSTG3   30
80 #define	GT_PORT_USB1    31
81 #define	GT_PORT_GPU0    32
82 #define	GT_PORT_GPU1    33
83 #define	GT_PORT_USB2    34
84 #define	GT_PORT_CPUM0   35
85 
86 #define GP_MST_CFG_DEFAULT \
87 	((GT_QOS_MAX << GT_QOS_SHIFT)   | \
88 	 (GT_THD_MAX << GT_THD1_SHIFT)  | \
89 	 (GT_REQN_MAX << GT_REQN_SHIFT) | \
90 	 (GT_THD_MAX << GT_THD0_SHIFT))
91 
92 #endif
93