1 /* 2 * (C) Copyright 2007-2012 3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 4 * Berg Xing <bergxing@allwinnertech.com> 5 * Tom Cubie <tangliang@allwinnertech.com> 6 * 7 * Sunxi platform dram register definition. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef _SUNXI_DRAM_H 13 #define _SUNXI_DRAM_H 14 15 #include <asm/io.h> 16 #include <linux/types.h> 17 18 /* dram regs definition */ 19 #if defined(CONFIG_MACH_SUN6I) 20 #include <asm/arch/dram_sun6i.h> 21 #elif defined(CONFIG_MACH_SUN8I) 22 #include <asm/arch/dram_sun8i.h> 23 #else 24 #include <asm/arch/dram_sun4i.h> 25 #endif 26 27 unsigned long sunxi_dram_init(void); 28 29 /* 30 * Wait up to 1s for value to be set in given part of reg. 31 */ 32 static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val) 33 { 34 unsigned long tmo = timer_get_us() + 1000000; 35 36 while ((readl(reg) & mask) != val) { 37 if (timer_get_us() > tmo) 38 panic("Timeout initialising DRAM\n"); 39 } 40 } 41 42 /* 43 * Test if memory at offset offset matches memory at begin of DRAM 44 */ 45 static inline bool mctl_mem_matches(u32 offset) 46 { 47 /* Try to write different values to RAM at two addresses */ 48 writel(0, CONFIG_SYS_SDRAM_BASE); 49 writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); 50 /* Check if the same value is actually observed when reading back */ 51 return readl(CONFIG_SYS_SDRAM_BASE) == 52 readl(CONFIG_SYS_SDRAM_BASE + offset); 53 } 54 55 #endif /* _SUNXI_DRAM_H */ 56