1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration settings for the Allwinner A64 (sun50i) CPU 4 */ 5 6 #if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD) 7 /* reserve space for BOOT0 header information */ 8 b reset 9 .space 1532 10 #elif defined(CONFIG_ARM_BOOT_HOOK_RMR) 11 /* 12 * Switch into AArch64 if needed. 13 * Refer to arch/arm/mach-sunxi/rmr_switch.S for the original source. 14 */ 15 tst x0, x0 // this is "b #0x84" in ARM 16 b reset 17 .space 0x7c 18 .word 0xe59f1024 // ldr r1, [pc, #36] ; 0x170000a0 19 .word 0xe59f0024 // ldr r0, [pc, #36] ; CONFIG_*_TEXT_BASE 20 .word 0xe5810000 // str r0, [r1] 21 .word 0xf57ff04f // dsb sy 22 .word 0xf57ff06f // isb sy 23 .word 0xee1c0f50 // mrc 15, 0, r0, cr12, cr0, {2} ; RMR 24 .word 0xe3800003 // orr r0, r0, #3 25 .word 0xee0c0f50 // mcr 15, 0, r0, cr12, cr0, {2} ; RMR 26 .word 0xf57ff06f // isb sy 27 .word 0xe320f003 // wfi 28 .word 0xeafffffd // b @wfi 29 #ifndef CONFIG_MACH_SUN50I_H6 30 .word 0x017000a0 // writeable RVBAR mapping address 31 #else 32 .word 0x09010040 // writeable RVBAR mapping address 33 #endif 34 #ifdef CONFIG_SPL_BUILD 35 .word CONFIG_SPL_TEXT_BASE 36 #else 37 .word CONFIG_SYS_TEXT_BASE 38 #endif 39 #else 40 /* normal execution */ 41 b reset 42 #endif 43