1 /* 2 * Configuration settings for the Allwinner A64 (sun50i) CPU 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD) 8 /* reserve space for BOOT0 header information */ 9 b reset 10 .space 1532 11 #elif defined(CONFIG_ARM_BOOT_HOOK_RMR) 12 /* 13 * Switch into AArch64 if needed. 14 * Refer to arch/arm/mach-sunxi/rmr_switch.S for the original source. 15 */ 16 tst x0, x0 // this is "b #0x84" in ARM 17 b reset 18 .space 0x7c 19 .word 0xe59f1024 // ldr r1, [pc, #36] ; 0x170000a0 20 .word 0xe59f0024 // ldr r0, [pc, #36] ; CONFIG_*_TEXT_BASE 21 .word 0xe5810000 // str r0, [r1] 22 .word 0xf57ff04f // dsb sy 23 .word 0xf57ff06f // isb sy 24 .word 0xee1c0f50 // mrc 15, 0, r0, cr12, cr0, {2} ; RMR 25 .word 0xe3800003 // orr r0, r0, #3 26 .word 0xee0c0f50 // mcr 15, 0, r0, cr12, cr0, {2} ; RMR 27 .word 0xf57ff06f // isb sy 28 .word 0xe320f003 // wfi 29 .word 0xeafffffd // b @wfi 30 .word 0x017000a0 // writeable RVBAR mapping address 31 #ifdef CONFIG_SPL_BUILD 32 .word CONFIG_SPL_TEXT_BASE 33 #else 34 .word CONFIG_SYS_TEXT_BASE 35 #endif 36 #else 37 /* normal execution */ 38 b reset 39 #endif 40