1*e66c49faSVikas Manocha /* 2*e66c49faSVikas Manocha * (C) Copyright 2016 3*e66c49faSVikas Manocha * Vikas Manocha, <vikas.manocha@st.com> 4*e66c49faSVikas Manocha * 5*e66c49faSVikas Manocha * SPDX-License-Identifier: GPL-2.0+ 6*e66c49faSVikas Manocha */ 7*e66c49faSVikas Manocha 8*e66c49faSVikas Manocha #ifndef _STM32_GPIO_H_ 9*e66c49faSVikas Manocha #define _STM32_GPIO_H_ 10*e66c49faSVikas Manocha 11*e66c49faSVikas Manocha enum stm32_gpio_port { 12*e66c49faSVikas Manocha STM32_GPIO_PORT_A = 0, 13*e66c49faSVikas Manocha STM32_GPIO_PORT_B, 14*e66c49faSVikas Manocha STM32_GPIO_PORT_C, 15*e66c49faSVikas Manocha STM32_GPIO_PORT_D, 16*e66c49faSVikas Manocha STM32_GPIO_PORT_E, 17*e66c49faSVikas Manocha STM32_GPIO_PORT_F, 18*e66c49faSVikas Manocha STM32_GPIO_PORT_G, 19*e66c49faSVikas Manocha STM32_GPIO_PORT_H, 20*e66c49faSVikas Manocha STM32_GPIO_PORT_I 21*e66c49faSVikas Manocha }; 22*e66c49faSVikas Manocha 23*e66c49faSVikas Manocha enum stm32_gpio_pin { 24*e66c49faSVikas Manocha STM32_GPIO_PIN_0 = 0, 25*e66c49faSVikas Manocha STM32_GPIO_PIN_1, 26*e66c49faSVikas Manocha STM32_GPIO_PIN_2, 27*e66c49faSVikas Manocha STM32_GPIO_PIN_3, 28*e66c49faSVikas Manocha STM32_GPIO_PIN_4, 29*e66c49faSVikas Manocha STM32_GPIO_PIN_5, 30*e66c49faSVikas Manocha STM32_GPIO_PIN_6, 31*e66c49faSVikas Manocha STM32_GPIO_PIN_7, 32*e66c49faSVikas Manocha STM32_GPIO_PIN_8, 33*e66c49faSVikas Manocha STM32_GPIO_PIN_9, 34*e66c49faSVikas Manocha STM32_GPIO_PIN_10, 35*e66c49faSVikas Manocha STM32_GPIO_PIN_11, 36*e66c49faSVikas Manocha STM32_GPIO_PIN_12, 37*e66c49faSVikas Manocha STM32_GPIO_PIN_13, 38*e66c49faSVikas Manocha STM32_GPIO_PIN_14, 39*e66c49faSVikas Manocha STM32_GPIO_PIN_15 40*e66c49faSVikas Manocha }; 41*e66c49faSVikas Manocha 42*e66c49faSVikas Manocha enum stm32_gpio_mode { 43*e66c49faSVikas Manocha STM32_GPIO_MODE_IN = 0, 44*e66c49faSVikas Manocha STM32_GPIO_MODE_OUT, 45*e66c49faSVikas Manocha STM32_GPIO_MODE_AF, 46*e66c49faSVikas Manocha STM32_GPIO_MODE_AN 47*e66c49faSVikas Manocha }; 48*e66c49faSVikas Manocha 49*e66c49faSVikas Manocha enum stm32_gpio_otype { 50*e66c49faSVikas Manocha STM32_GPIO_OTYPE_PP = 0, 51*e66c49faSVikas Manocha STM32_GPIO_OTYPE_OD 52*e66c49faSVikas Manocha }; 53*e66c49faSVikas Manocha 54*e66c49faSVikas Manocha enum stm32_gpio_speed { 55*e66c49faSVikas Manocha STM32_GPIO_SPEED_2M = 0, 56*e66c49faSVikas Manocha STM32_GPIO_SPEED_25M, 57*e66c49faSVikas Manocha STM32_GPIO_SPEED_50M, 58*e66c49faSVikas Manocha STM32_GPIO_SPEED_100M 59*e66c49faSVikas Manocha }; 60*e66c49faSVikas Manocha 61*e66c49faSVikas Manocha enum stm32_gpio_pupd { 62*e66c49faSVikas Manocha STM32_GPIO_PUPD_NO = 0, 63*e66c49faSVikas Manocha STM32_GPIO_PUPD_UP, 64*e66c49faSVikas Manocha STM32_GPIO_PUPD_DOWN 65*e66c49faSVikas Manocha }; 66*e66c49faSVikas Manocha 67*e66c49faSVikas Manocha enum stm32_gpio_af { 68*e66c49faSVikas Manocha STM32_GPIO_AF0 = 0, 69*e66c49faSVikas Manocha STM32_GPIO_AF1, 70*e66c49faSVikas Manocha STM32_GPIO_AF2, 71*e66c49faSVikas Manocha STM32_GPIO_AF3, 72*e66c49faSVikas Manocha STM32_GPIO_AF4, 73*e66c49faSVikas Manocha STM32_GPIO_AF5, 74*e66c49faSVikas Manocha STM32_GPIO_AF6, 75*e66c49faSVikas Manocha STM32_GPIO_AF7, 76*e66c49faSVikas Manocha STM32_GPIO_AF8, 77*e66c49faSVikas Manocha STM32_GPIO_AF9, 78*e66c49faSVikas Manocha STM32_GPIO_AF10, 79*e66c49faSVikas Manocha STM32_GPIO_AF11, 80*e66c49faSVikas Manocha STM32_GPIO_AF12, 81*e66c49faSVikas Manocha STM32_GPIO_AF13, 82*e66c49faSVikas Manocha STM32_GPIO_AF14, 83*e66c49faSVikas Manocha STM32_GPIO_AF15 84*e66c49faSVikas Manocha }; 85*e66c49faSVikas Manocha 86*e66c49faSVikas Manocha struct stm32_gpio_dsc { 87*e66c49faSVikas Manocha enum stm32_gpio_port port; 88*e66c49faSVikas Manocha enum stm32_gpio_pin pin; 89*e66c49faSVikas Manocha }; 90*e66c49faSVikas Manocha 91*e66c49faSVikas Manocha struct stm32_gpio_ctl { 92*e66c49faSVikas Manocha enum stm32_gpio_mode mode; 93*e66c49faSVikas Manocha enum stm32_gpio_otype otype; 94*e66c49faSVikas Manocha enum stm32_gpio_speed speed; 95*e66c49faSVikas Manocha enum stm32_gpio_pupd pupd; 96*e66c49faSVikas Manocha enum stm32_gpio_af af; 97*e66c49faSVikas Manocha }; 98*e66c49faSVikas Manocha 99*e66c49faSVikas Manocha static inline unsigned stm32_gpio_to_port(unsigned gpio) 100*e66c49faSVikas Manocha { 101*e66c49faSVikas Manocha return gpio / 16; 102*e66c49faSVikas Manocha } 103*e66c49faSVikas Manocha 104*e66c49faSVikas Manocha static inline unsigned stm32_gpio_to_pin(unsigned gpio) 105*e66c49faSVikas Manocha { 106*e66c49faSVikas Manocha return gpio % 16; 107*e66c49faSVikas Manocha } 108*e66c49faSVikas Manocha 109*e66c49faSVikas Manocha int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc, 110*e66c49faSVikas Manocha const struct stm32_gpio_ctl *gpio_ctl); 111*e66c49faSVikas Manocha int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state); 112*e66c49faSVikas Manocha 113*e66c49faSVikas Manocha #endif /* _STM32_GPIO_H_ */ 114