1e66c49faSVikas Manocha /* 2e66c49faSVikas Manocha * (C) Copyright 2016 3e66c49faSVikas Manocha * Vikas Manocha, <vikas.manocha@st.com> 4e66c49faSVikas Manocha * 5e66c49faSVikas Manocha * SPDX-License-Identifier: GPL-2.0+ 6e66c49faSVikas Manocha */ 7e66c49faSVikas Manocha 8e66c49faSVikas Manocha #ifndef _STM32_GPIO_H_ 9e66c49faSVikas Manocha #define _STM32_GPIO_H_ 10e66c49faSVikas Manocha 11e66c49faSVikas Manocha enum stm32_gpio_port { 12e66c49faSVikas Manocha STM32_GPIO_PORT_A = 0, 13e66c49faSVikas Manocha STM32_GPIO_PORT_B, 14e66c49faSVikas Manocha STM32_GPIO_PORT_C, 15e66c49faSVikas Manocha STM32_GPIO_PORT_D, 16e66c49faSVikas Manocha STM32_GPIO_PORT_E, 17e66c49faSVikas Manocha STM32_GPIO_PORT_F, 18e66c49faSVikas Manocha STM32_GPIO_PORT_G, 19e66c49faSVikas Manocha STM32_GPIO_PORT_H, 20e66c49faSVikas Manocha STM32_GPIO_PORT_I 21e66c49faSVikas Manocha }; 22e66c49faSVikas Manocha 23e66c49faSVikas Manocha enum stm32_gpio_pin { 24e66c49faSVikas Manocha STM32_GPIO_PIN_0 = 0, 25e66c49faSVikas Manocha STM32_GPIO_PIN_1, 26e66c49faSVikas Manocha STM32_GPIO_PIN_2, 27e66c49faSVikas Manocha STM32_GPIO_PIN_3, 28e66c49faSVikas Manocha STM32_GPIO_PIN_4, 29e66c49faSVikas Manocha STM32_GPIO_PIN_5, 30e66c49faSVikas Manocha STM32_GPIO_PIN_6, 31e66c49faSVikas Manocha STM32_GPIO_PIN_7, 32e66c49faSVikas Manocha STM32_GPIO_PIN_8, 33e66c49faSVikas Manocha STM32_GPIO_PIN_9, 34e66c49faSVikas Manocha STM32_GPIO_PIN_10, 35e66c49faSVikas Manocha STM32_GPIO_PIN_11, 36e66c49faSVikas Manocha STM32_GPIO_PIN_12, 37e66c49faSVikas Manocha STM32_GPIO_PIN_13, 38e66c49faSVikas Manocha STM32_GPIO_PIN_14, 39e66c49faSVikas Manocha STM32_GPIO_PIN_15 40e66c49faSVikas Manocha }; 41e66c49faSVikas Manocha 42e66c49faSVikas Manocha enum stm32_gpio_mode { 43e66c49faSVikas Manocha STM32_GPIO_MODE_IN = 0, 44e66c49faSVikas Manocha STM32_GPIO_MODE_OUT, 45e66c49faSVikas Manocha STM32_GPIO_MODE_AF, 46e66c49faSVikas Manocha STM32_GPIO_MODE_AN 47e66c49faSVikas Manocha }; 48e66c49faSVikas Manocha 49e66c49faSVikas Manocha enum stm32_gpio_otype { 50e66c49faSVikas Manocha STM32_GPIO_OTYPE_PP = 0, 51e66c49faSVikas Manocha STM32_GPIO_OTYPE_OD 52e66c49faSVikas Manocha }; 53e66c49faSVikas Manocha 54e66c49faSVikas Manocha enum stm32_gpio_speed { 55e66c49faSVikas Manocha STM32_GPIO_SPEED_2M = 0, 56e66c49faSVikas Manocha STM32_GPIO_SPEED_25M, 57e66c49faSVikas Manocha STM32_GPIO_SPEED_50M, 58e66c49faSVikas Manocha STM32_GPIO_SPEED_100M 59e66c49faSVikas Manocha }; 60e66c49faSVikas Manocha 61e66c49faSVikas Manocha enum stm32_gpio_pupd { 62e66c49faSVikas Manocha STM32_GPIO_PUPD_NO = 0, 63e66c49faSVikas Manocha STM32_GPIO_PUPD_UP, 64e66c49faSVikas Manocha STM32_GPIO_PUPD_DOWN 65e66c49faSVikas Manocha }; 66e66c49faSVikas Manocha 67e66c49faSVikas Manocha enum stm32_gpio_af { 68e66c49faSVikas Manocha STM32_GPIO_AF0 = 0, 69e66c49faSVikas Manocha STM32_GPIO_AF1, 70e66c49faSVikas Manocha STM32_GPIO_AF2, 71e66c49faSVikas Manocha STM32_GPIO_AF3, 72e66c49faSVikas Manocha STM32_GPIO_AF4, 73e66c49faSVikas Manocha STM32_GPIO_AF5, 74e66c49faSVikas Manocha STM32_GPIO_AF6, 75e66c49faSVikas Manocha STM32_GPIO_AF7, 76e66c49faSVikas Manocha STM32_GPIO_AF8, 77e66c49faSVikas Manocha STM32_GPIO_AF9, 78e66c49faSVikas Manocha STM32_GPIO_AF10, 79e66c49faSVikas Manocha STM32_GPIO_AF11, 80e66c49faSVikas Manocha STM32_GPIO_AF12, 81e66c49faSVikas Manocha STM32_GPIO_AF13, 82e66c49faSVikas Manocha STM32_GPIO_AF14, 83e66c49faSVikas Manocha STM32_GPIO_AF15 84e66c49faSVikas Manocha }; 85e66c49faSVikas Manocha 86e66c49faSVikas Manocha struct stm32_gpio_dsc { 87e66c49faSVikas Manocha enum stm32_gpio_port port; 88e66c49faSVikas Manocha enum stm32_gpio_pin pin; 89e66c49faSVikas Manocha }; 90e66c49faSVikas Manocha 91e66c49faSVikas Manocha struct stm32_gpio_ctl { 92e66c49faSVikas Manocha enum stm32_gpio_mode mode; 93e66c49faSVikas Manocha enum stm32_gpio_otype otype; 94e66c49faSVikas Manocha enum stm32_gpio_speed speed; 95e66c49faSVikas Manocha enum stm32_gpio_pupd pupd; 96e66c49faSVikas Manocha enum stm32_gpio_af af; 97e66c49faSVikas Manocha }; 98e66c49faSVikas Manocha 99*77417102SVikas Manocha struct stm32_gpio_regs { 100*77417102SVikas Manocha u32 moder; /* GPIO port mode */ 101*77417102SVikas Manocha u32 otyper; /* GPIO port output type */ 102*77417102SVikas Manocha u32 ospeedr; /* GPIO port output speed */ 103*77417102SVikas Manocha u32 pupdr; /* GPIO port pull-up/pull-down */ 104*77417102SVikas Manocha u32 idr; /* GPIO port input data */ 105*77417102SVikas Manocha u32 odr; /* GPIO port output data */ 106*77417102SVikas Manocha u32 bsrr; /* GPIO port bit set/reset */ 107*77417102SVikas Manocha u32 lckr; /* GPIO port configuration lock */ 108*77417102SVikas Manocha u32 afr[2]; /* GPIO alternate function */ 109*77417102SVikas Manocha }; 110*77417102SVikas Manocha 111*77417102SVikas Manocha struct stm32_gpio_priv { 112*77417102SVikas Manocha struct stm32_gpio_regs *regs; 113*77417102SVikas Manocha }; 114*77417102SVikas Manocha 115e66c49faSVikas Manocha static inline unsigned stm32_gpio_to_port(unsigned gpio) 116e66c49faSVikas Manocha { 117e66c49faSVikas Manocha return gpio / 16; 118e66c49faSVikas Manocha } 119e66c49faSVikas Manocha 120e66c49faSVikas Manocha static inline unsigned stm32_gpio_to_pin(unsigned gpio) 121e66c49faSVikas Manocha { 122e66c49faSVikas Manocha return gpio % 16; 123e66c49faSVikas Manocha } 124e66c49faSVikas Manocha 125e66c49faSVikas Manocha #endif /* _STM32_GPIO_H_ */ 126