1 /* 2 * Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ASM_ARCH_HARDWARE_H 8 #define _ASM_ARCH_HARDWARE_H 9 10 #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set) 11 #define RK_SETBITS(set) RK_CLRSETBITS(0, set) 12 #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) 13 14 #define TIMER7_BASE 0xff810020 15 16 #define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr) 17 #define rk_clrreg(addr, clr) writel((clr) << 16, addr) 18 #define rk_setreg(addr, set) writel(set, addr) 19 20 #endif 21