1 /* 2 * linux/include/asm-arm/arch-pxa/hardware.h 3 * 4 * Author: Nicolas Pitre 5 * Created: Jun 15, 2001 6 * Copyright: MontaVista Software Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Note: This file was taken from linux-2.4.19-rmk4-pxa1 13 * 14 * - 2003/01/20 implementation specifics activated 15 * Robert Schwebel <r.schwebel@pengutronix.de> 16 */ 17 18 #ifndef __ASM_ARCH_HARDWARE_H 19 #define __ASM_ARCH_HARDWARE_H 20 21 #include <linux/config.h> 22 #include <asm/mach-types.h> 23 24 /* 25 * Define CONFIG_CPU_MONAHANS in case some CPU of the PXA3xx family is selected. 26 * PXA300/310/320 all have distinct register mappings in some cases, that's why 27 * the exact CPU has to be selected. CONFIG_CPU_MONAHANS is a helper for common 28 * drivers and compatibility glue with old source then. 29 */ 30 #ifndef CONFIG_CPU_MONAHANS 31 #if defined(CONFIG_CPU_PXA300) || \ 32 defined(CONFIG_CPU_PXA310) || \ 33 defined(CONFIG_CPU_PXA320) 34 #define CONFIG_CPU_MONAHANS 35 #endif 36 #endif 37 38 /* 39 * These are statically mapped PCMCIA IO space for designs using it as a 40 * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. 41 * The actual PCMCIA code is mapping required IO region at run time. 42 */ 43 #define PCMCIA_IO_0_BASE 0xf6000000 44 #define PCMCIA_IO_1_BASE 0xf7000000 45 46 47 /* 48 * We requires absolute addresses. 49 */ 50 #define PCIO_BASE 0 51 52 /* 53 * Workarounds for at least 2 errata so far require this. 54 * The mapping is set in mach-pxa/generic.c. 55 */ 56 #define UNCACHED_PHYS_0 0xff000000 57 #define UNCACHED_ADDR UNCACHED_PHYS_0 58 59 /* 60 * Intel PXA internal I/O mappings: 61 * 62 * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff 63 * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff 64 * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff 65 */ 66 67 #include "pxa-regs.h" 68 69 #ifndef __ASSEMBLY__ 70 71 /* 72 * GPIO edge detection for IRQs: 73 * IRQs are generated on Falling-Edge, Rising-Edge, or both. 74 * This must be called *before* the corresponding IRQ is registered. 75 * Use this instead of directly setting GRER/GFER. 76 */ 77 #define GPIO_FALLING_EDGE 1 78 #define GPIO_RISING_EDGE 2 79 #define GPIO_BOTH_EDGES 3 80 81 #endif 82 83 84 /* 85 * Implementation specifics 86 */ 87 88 #ifdef CONFIG_ARCH_LUBBOCK 89 #include "lubbock.h" 90 #endif 91 92 #ifdef CONFIG_ARCH_PXA_IDP 93 #include "idp.h" 94 #endif 95 96 #ifdef CONFIG_ARCH_PXA_CERF 97 #include "cerf.h" 98 #endif 99 100 #ifdef CONFIG_ARCH_CSB226 101 #include "csb226.h" 102 #endif 103 104 #ifdef CONFIG_ARCH_INNOKOM 105 #include "innokom.h" 106 #endif 107 108 #ifdef CONFIG_ARCH_PLEB 109 #include "pleb.h" 110 #endif 111 112 #endif /* _ASM_ARCH_HARDWARE_H */ 113