1 /*
2  * (C) Copyright 2010
3  * Texas Instruments, <www.ti.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _SYS_PROTO_H_
9 #define _SYS_PROTO_H_
10 
11 #include <asm/arch/omap.h>
12 #include <asm/io.h>
13 #include <asm/arch/clock.h>
14 #include <asm/omap_common.h>
15 #include <asm/arch/clock.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 struct pad_conf_entry {
20 	u32 offset;
21 	u32 val;
22 };
23 
24 struct omap_sysinfo {
25 	char *board_string;
26 };
27 extern const struct omap_sysinfo sysinfo;
28 
29 void gpmc_init(void);
30 void watchdog_init(void);
31 u32 get_device_type(void);
32 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
33 void set_muxconf_regs_essential(void);
34 void set_muxconf_regs_non_essential(void);
35 void sr32(void *, u32, u32, u32);
36 u32 wait_on_value(u32, u32, void *, u32);
37 void sdelay(unsigned long);
38 void setup_clocks_for_console(void);
39 void prcm_init(void);
40 void bypass_dpll(u32 const base);
41 void freq_update_core(void);
42 u32 get_sys_clk_freq(void);
43 u32 omap5_ddr_clk(void);
44 void cancel_out(u32 *num, u32 *den, u32 den_limit);
45 void sdram_init(void);
46 u32 omap_sdram_size(void);
47 u32 cortex_rev(void);
48 void save_omap_boot_params(void);
49 void init_omap_revision(void);
50 void do_io_settings(void);
51 void sri2c_init(void);
52 void gpi2c_init(void);
53 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
54 u32 warm_reset(void);
55 void force_emif_self_refresh(void);
56 void get_ioregs(const struct ctrl_ioregs **regs);
57 void srcomp_enable(void);
58 void setup_warmreset_time(void);
59 
60 static inline u32 running_from_sdram(void)
61 {
62 	u32 pc;
63 	asm volatile ("mov %0, pc" : "=r" (pc));
64 	return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
65 	    (pc < OMAP54XX_DRAM_ADDR_SPACE_END));
66 }
67 
68 static inline u8 uboot_loaded_by_spl(void)
69 {
70 	/*
71 	 * u-boot can be running from sdram either because of configuration
72 	 * Header or by SPL. If because of CH, then the romcode sets the
73 	 * CHSETTINGS executed bit to true in the boot parameter structure that
74 	 * it passes to the bootloader.This parameter is stored in the ch_flags
75 	 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
76 	 * mandatory section if CH is present.
77 	 */
78 	if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
79 		return 0;
80 	else
81 		return running_from_sdram();
82 }
83 /*
84  * The basic hardware init of OMAP(s_init()) can happen in 4
85  * different contexts:
86  *  1. SPL running from SRAM
87  *  2. U-Boot running from FLASH
88  *  3. Non-XIP U-Boot loaded to SDRAM by SPL
89  *  4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
90  *     Configuration Header feature
91  *
92  * This function finds this context.
93  * Defining as inline may help in compiling out unused functions in SPL
94  */
95 static inline u32 omap_hw_init_context(void)
96 {
97 #ifdef CONFIG_SPL_BUILD
98 	return OMAP_INIT_CONTEXT_SPL;
99 #else
100 	if (uboot_loaded_by_spl())
101 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
102 	else if (running_from_sdram())
103 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
104 	else
105 		return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
106 #endif
107 }
108 
109 static inline u32 div_round_up(u32 num, u32 den)
110 {
111 	return (num + den - 1)/den;
112 }
113 
114 static inline u32 usec_to_32k(u32 usec)
115 {
116 	return div_round_up(32768 * usec, 1000000);
117 }
118 #endif
119