1 /*
2  * (C) Copyright 2010
3  * Texas Instruments, <www.ti.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _SYS_PROTO_H_
9 #define _SYS_PROTO_H_
10 
11 #include <asm/arch/omap.h>
12 #include <asm/io.h>
13 #include <asm/arch/clock.h>
14 #include <asm/omap_common.h>
15 #include <linux/mtd/omap_gpmc.h>
16 #include <asm/arch/clock.h>
17 #include <asm/ti-common/sys_proto.h>
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 /*
22  * Structure for Iodelay configuration registers.
23  * Theoretical max for g_delay is 21560 ps.
24  * Theoretical max for a_delay is 1/3rd of g_delay max.
25  * So using u16 for both a/g_delay.
26  */
27 struct iodelay_cfg_entry {
28 	u16 offset;
29 	u16 a_delay;
30 	u16 g_delay;
31 };
32 
33 struct pad_conf_entry {
34 	u32 offset;
35 	u32 val;
36 };
37 
38 struct mmc_platform_fixups {
39 	const char *hw_rev;
40 	u32 unsupported_caps;
41 	u32 max_freq;
42 };
43 
44 struct omap_sysinfo {
45 	char *board_string;
46 };
47 extern const struct omap_sysinfo sysinfo;
48 
49 void gpmc_init(void);
50 void watchdog_init(void);
51 u32 get_device_type(void);
52 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
53 void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size);
54 void set_muxconf_regs(void);
55 u32 wait_on_value(u32, u32, void *, u32);
56 void sdelay(unsigned long);
57 void setup_early_clocks(void);
58 void prcm_init(void);
59 void do_board_detect(void);
60 void vcores_init(void);
61 void bypass_dpll(u32 const base);
62 void freq_update_core(void);
63 u32 get_sys_clk_freq(void);
64 u32 omap5_ddr_clk(void);
65 void cancel_out(u32 *num, u32 *den, u32 den_limit);
66 void sdram_init(void);
67 u32 omap_sdram_size(void);
68 u32 cortex_rev(void);
69 void save_omap_boot_params(void);
70 void init_omap_revision(void);
71 void init_package_revision(void);
72 void do_io_settings(void);
73 void sri2c_init(void);
74 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
75 u32 warm_reset(void);
76 void force_emif_self_refresh(void);
77 void get_ioregs(const struct ctrl_ioregs **regs);
78 void srcomp_enable(void);
79 void setup_warmreset_time(void);
80 const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
81 
82 static inline u32 div_round_up(u32 num, u32 den)
83 {
84 	return (num + den - 1)/den;
85 }
86 
87 static inline u32 usec_to_32k(u32 usec)
88 {
89 	return div_round_up(32768 * usec, 1000000);
90 }
91 
92 #define OMAP5_SERVICE_L2ACTLR_SET    0x104
93 #define OMAP5_SERVICE_ACR_SET        0x107
94 
95 #endif
96