1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 21 #ifndef _SYS_PROTO_H_ 22 #define _SYS_PROTO_H_ 23 24 #include <asm/arch/omap.h> 25 #include <asm/io.h> 26 #include <asm/arch/clocks.h> 27 #include <asm/omap_common.h> 28 #include <asm/arch/clocks.h> 29 30 DECLARE_GLOBAL_DATA_PTR; 31 32 struct pad_conf_entry { 33 u32 offset; 34 u32 val; 35 }; 36 37 struct omap_sysinfo { 38 char *board_string; 39 }; 40 extern const struct omap_sysinfo sysinfo; 41 42 void gpmc_init(void); 43 void watchdog_init(void); 44 u32 get_device_type(void); 45 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); 46 void set_muxconf_regs_essential(void); 47 void set_muxconf_regs_non_essential(void); 48 void sr32(void *, u32, u32, u32); 49 u32 wait_on_value(u32, u32, void *, u32); 50 void sdelay(unsigned long); 51 void setup_clocks_for_console(void); 52 void prcm_init(void); 53 void bypass_dpll(u32 const base); 54 void freq_update_core(void); 55 u32 get_sys_clk_freq(void); 56 u32 omap5_ddr_clk(void); 57 void cancel_out(u32 *num, u32 *den, u32 den_limit); 58 void sdram_init(void); 59 u32 omap_sdram_size(void); 60 u32 cortex_rev(void); 61 void init_omap_revision(void); 62 void do_io_settings(void); 63 void omap_vc_init(u16 speed_khz); 64 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); 65 u32 warm_reset(void); 66 void force_emif_self_refresh(void); 67 void get_ioregs(const struct ctrl_ioregs **regs); 68 void srcomp_enable(void); 69 void setup_warmreset_time(void); 70 71 static inline u32 running_from_sdram(void) 72 { 73 u32 pc; 74 asm volatile ("mov %0, pc" : "=r" (pc)); 75 return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) && 76 (pc < OMAP54XX_DRAM_ADDR_SPACE_END)); 77 } 78 79 static inline u8 uboot_loaded_by_spl(void) 80 { 81 /* 82 * u-boot can be running from sdram either because of configuration 83 * Header or by SPL. If because of CH, then the romcode sets the 84 * CHSETTINGS executed bit to true in the boot parameter structure that 85 * it passes to the bootloader.This parameter is stored in the ch_flags 86 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a 87 * mandatory section if CH is present. 88 */ 89 if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) 90 return 0; 91 else 92 return running_from_sdram(); 93 } 94 /* 95 * The basic hardware init of OMAP(s_init()) can happen in 4 96 * different contexts: 97 * 1. SPL running from SRAM 98 * 2. U-Boot running from FLASH 99 * 3. Non-XIP U-Boot loaded to SDRAM by SPL 100 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the 101 * Configuration Header feature 102 * 103 * This function finds this context. 104 * Defining as inline may help in compiling out unused functions in SPL 105 */ 106 static inline u32 omap_hw_init_context(void) 107 { 108 #ifdef CONFIG_SPL_BUILD 109 return OMAP_INIT_CONTEXT_SPL; 110 #else 111 if (uboot_loaded_by_spl()) 112 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL; 113 else if (running_from_sdram()) 114 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH; 115 else 116 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR; 117 #endif 118 } 119 120 static inline u32 div_round_up(u32 num, u32 den) 121 { 122 return (num + den - 1)/den; 123 } 124 125 static inline u32 usec_to_32k(u32 usec) 126 { 127 return div_round_up(32768 * usec, 1000000); 128 } 129 #endif 130