1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated 4 * 5 * Nishant Kamat <nskamat@ti.com> 6 * Lokesh Vutla <lokeshvutla@ti.com> 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 #ifndef _MUX_DRA7XX_H_ 27 #define _MUX_DRA7XX_H_ 28 29 #include <asm/types.h> 30 31 #define FSC (1 << 19) 32 #define SSC (0 << 19) 33 34 #define IEN (1 << 18) 35 #define IDIS (0 << 18) 36 37 #define PTU (1 << 17) 38 #define PTD (0 << 17) 39 #define PEN (1 << 16) 40 #define PDIS (0 << 16) 41 42 #define WKEN (1 << 24) 43 #define WKDIS (0 << 24) 44 45 #define M0 0 46 #define M1 1 47 #define M2 2 48 #define M3 3 49 #define M4 4 50 #define M5 5 51 #define M6 6 52 #define M7 7 53 #define M8 8 54 #define M9 9 55 #define M10 10 56 #define M11 11 57 #define M12 12 58 #define M13 13 59 #define M14 14 60 #define M15 15 61 62 #define SAFE_MODE M15 63 64 #define GPMC_AD0 0x000 65 #define GPMC_AD1 0x004 66 #define GPMC_AD2 0x008 67 #define GPMC_AD3 0x00C 68 #define GPMC_AD4 0x010 69 #define GPMC_AD5 0x014 70 #define GPMC_AD6 0x018 71 #define GPMC_AD7 0x01C 72 #define GPMC_AD8 0x020 73 #define GPMC_AD9 0x024 74 #define GPMC_AD10 0x028 75 #define GPMC_AD11 0x02C 76 #define GPMC_AD12 0x030 77 #define GPMC_AD13 0x034 78 #define GPMC_AD14 0x038 79 #define GPMC_AD15 0x03C 80 #define GPMC_A0 0x040 81 #define GPMC_A1 0x044 82 #define GPMC_A2 0x048 83 #define GPMC_A3 0x04C 84 #define GPMC_A4 0x050 85 #define GPMC_A5 0x054 86 #define GPMC_A6 0x058 87 #define GPMC_A7 0x05C 88 #define GPMC_A8 0x060 89 #define GPMC_A9 0x064 90 #define GPMC_A10 0x068 91 #define GPMC_A11 0x06C 92 #define GPMC_A12 0x070 93 #define GPMC_A13 0x074 94 #define GPMC_A14 0x078 95 #define GPMC_A15 0x07C 96 #define GPMC_A16 0x080 97 #define GPMC_A17 0x084 98 #define GPMC_A18 0x088 99 #define GPMC_A19 0x08C 100 #define GPMC_A20 0x090 101 #define GPMC_A21 0x094 102 #define GPMC_A22 0x098 103 #define GPMC_A23 0x09C 104 #define GPMC_A24 0x0A0 105 #define GPMC_A25 0x0A4 106 #define GPMC_A26 0x0A8 107 #define GPMC_A27 0x0AC 108 #define GPMC_CS1 0x0B0 109 #define GPMC_CS0 0x0B4 110 #define GPMC_CS2 0x0B8 111 #define GPMC_CS3 0x0BC 112 #define GPMC_CLK 0x0C0 113 #define GPMC_ADVN_ALE 0x0C4 114 #define GPMC_OEN_REN 0x0C8 115 #define GPMC_WEN 0x0CC 116 #define GPMC_BEN0 0x0D0 117 #define GPMC_BEN1 0x0D4 118 #define GPMC_WAIT0 0x0D8 119 #define VIN1A_CLK0 0x0DC 120 #define VIN1B_CLK1 0x0E0 121 #define VIN1A_DE0 0x0E4 122 #define VIN1A_FLD0 0x0E8 123 #define VIN1A_HSYNC0 0x0EC 124 #define VIN1A_VSYNC0 0x0F0 125 #define VIN1A_D0 0x0F4 126 #define VIN1A_D1 0x0F8 127 #define VIN1A_D2 0x0FC 128 #define VIN1A_D3 0x100 129 #define VIN1A_D4 0x104 130 #define VIN1A_D5 0x108 131 #define VIN1A_D6 0x10C 132 #define VIN1A_D7 0x110 133 #define VIN1A_D8 0x114 134 #define VIN1A_D9 0x118 135 #define VIN1A_D10 0x11C 136 #define VIN1A_D11 0x120 137 #define VIN1A_D12 0x124 138 #define VIN1A_D13 0x128 139 #define VIN1A_D14 0x12C 140 #define VIN1A_D15 0x130 141 #define VIN1A_D16 0x134 142 #define VIN1A_D17 0x138 143 #define VIN1A_D18 0x13C 144 #define VIN1A_D19 0x140 145 #define VIN1A_D20 0x144 146 #define VIN1A_D21 0x148 147 #define VIN1A_D22 0x14C 148 #define VIN1A_D23 0x150 149 #define VIN2A_CLK0 0x154 150 #define VIN2A_DE0 0x158 151 #define VIN2A_FLD0 0x15C 152 #define VIN2A_HSYNC0 0x160 153 #define VIN2A_VSYNC0 0x164 154 #define VIN2A_D0 0x168 155 #define VIN2A_D1 0x16C 156 #define VIN2A_D2 0x170 157 #define VIN2A_D3 0x174 158 #define VIN2A_D4 0x178 159 #define VIN2A_D5 0x17C 160 #define VIN2A_D6 0x180 161 #define VIN2A_D7 0x184 162 #define VIN2A_D8 0x188 163 #define VIN2A_D9 0x18C 164 #define VIN2A_D10 0x190 165 #define VIN2A_D11 0x194 166 #define VIN2A_D12 0x198 167 #define VIN2A_D13 0x19C 168 #define VIN2A_D14 0x1A0 169 #define VIN2A_D15 0x1A4 170 #define VIN2A_D16 0x1A8 171 #define VIN2A_D17 0x1AC 172 #define VIN2A_D18 0x1B0 173 #define VIN2A_D19 0x1B4 174 #define VIN2A_D20 0x1B8 175 #define VIN2A_D21 0x1BC 176 #define VIN2A_D22 0x1C0 177 #define VIN2A_D23 0x1C4 178 #define VOUT1_CLK 0x1C8 179 #define VOUT1_DE 0x1CC 180 #define VOUT1_FLD 0x1D0 181 #define VOUT1_HSYNC 0x1D4 182 #define VOUT1_VSYNC 0x1D8 183 #define VOUT1_D0 0x1DC 184 #define VOUT1_D1 0x1E0 185 #define VOUT1_D2 0x1E4 186 #define VOUT1_D3 0x1E8 187 #define VOUT1_D4 0x1EC 188 #define VOUT1_D5 0x1F0 189 #define VOUT1_D6 0x1F4 190 #define VOUT1_D7 0x1F8 191 #define VOUT1_D8 0x1FC 192 #define VOUT1_D9 0x200 193 #define VOUT1_D10 0x204 194 #define VOUT1_D11 0x208 195 #define VOUT1_D12 0x20C 196 #define VOUT1_D13 0x210 197 #define VOUT1_D14 0x214 198 #define VOUT1_D15 0x218 199 #define VOUT1_D16 0x21C 200 #define VOUT1_D17 0x220 201 #define VOUT1_D18 0x224 202 #define VOUT1_D19 0x228 203 #define VOUT1_D20 0x22C 204 #define VOUT1_D21 0x230 205 #define VOUT1_D22 0x234 206 #define VOUT1_D23 0x238 207 #define MDIO_MCLK 0x23C 208 #define MDIO_D 0x240 209 #define RMII_MHZ_50_CLK 0x244 210 #define UART3_RXD 0x248 211 #define UART3_TXD 0x24C 212 #define RGMII0_TXC 0x250 213 #define RGMII0_TXCTL 0x254 214 #define RGMII0_TXD3 0x258 215 #define RGMII0_TXD2 0x25C 216 #define RGMII0_TXD1 0x260 217 #define RGMII0_TXD0 0x264 218 #define RGMII0_RXC 0x268 219 #define RGMII0_RXCTL 0x26C 220 #define RGMII0_RXD3 0x270 221 #define RGMII0_RXD2 0x274 222 #define RGMII0_RXD1 0x278 223 #define RGMII0_RXD0 0x27C 224 #define USB1_DRVVBUS 0x280 225 #define USB2_DRVVBUS 0x284 226 #define GPIO6_14 0x288 227 #define GPIO6_15 0x28C 228 #define GPIO6_16 0x290 229 #define XREF_CLK0 0x294 230 #define XREF_CLK1 0x298 231 #define XREF_CLK2 0x29C 232 #define XREF_CLK3 0x2A0 233 #define MCASP1_ACLKX 0x2A4 234 #define MCASP1_FSX 0x2A8 235 #define MCASP1_ACLKR 0x2AC 236 #define MCASP1_FSR 0x2B0 237 #define MCASP1_AXR0 0x2B4 238 #define MCASP1_AXR1 0x2B8 239 #define MCASP1_AXR2 0x2BC 240 #define MCASP1_AXR3 0x2C0 241 #define MCASP1_AXR4 0x2C4 242 #define MCASP1_AXR5 0x2C8 243 #define MCASP1_AXR6 0x2CC 244 #define MCASP1_AXR7 0x2D0 245 #define MCASP1_AXR8 0x2D4 246 #define MCASP1_AXR9 0x2D8 247 #define MCASP1_AXR10 0x2DC 248 #define MCASP1_AXR11 0x2E0 249 #define MCASP1_AXR12 0x2E4 250 #define MCASP1_AXR13 0x2E8 251 #define MCASP1_AXR14 0x2EC 252 #define MCASP1_AXR15 0x2F0 253 #define MCASP2_ACLKX 0x2F4 254 #define MCASP2_FSX 0x2F8 255 #define MCASP2_ACLKR 0x2FC 256 #define MCASP2_FSR 0x300 257 #define MCASP2_AXR0 0x304 258 #define MCASP2_AXR1 0x308 259 #define MCASP2_AXR2 0x30C 260 #define MCASP2_AXR3 0x310 261 #define MCASP2_AXR4 0x314 262 #define MCASP2_AXR5 0x318 263 #define MCASP2_AXR6 0x31C 264 #define MCASP2_AXR7 0x320 265 #define MCASP3_ACLKX 0x324 266 #define MCASP3_FSX 0x328 267 #define MCASP3_AXR0 0x32C 268 #define MCASP3_AXR1 0x330 269 #define MCASP4_ACLKX 0x334 270 #define MCASP4_FSX 0x338 271 #define MCASP4_AXR0 0x33C 272 #define MCASP4_AXR1 0x340 273 #define MCASP5_ACLKX 0x344 274 #define MCASP5_FSX 0x348 275 #define MCASP5_AXR0 0x34C 276 #define MCASP5_AXR1 0x350 277 #define MMC1_CLK 0x354 278 #define MMC1_CMD 0x358 279 #define MMC1_DAT0 0x35C 280 #define MMC1_DAT1 0x360 281 #define MMC1_DAT2 0x364 282 #define MMC1_DAT3 0x368 283 #define MMC1_SDCD 0x36C 284 #define MMC1_SDWP 0x370 285 #define GPIO6_10 0x374 286 #define GPIO6_11 0x378 287 #define MMC3_CLK 0x37C 288 #define MMC3_CMD 0x380 289 #define MMC3_DAT0 0x384 290 #define MMC3_DAT1 0x388 291 #define MMC3_DAT2 0x38C 292 #define MMC3_DAT3 0x390 293 #define MMC3_DAT4 0x394 294 #define MMC3_DAT5 0x398 295 #define MMC3_DAT6 0x39C 296 #define MMC3_DAT7 0x3A0 297 #define SPI1_SCLK 0x3A4 298 #define SPI1_D1 0x3A8 299 #define SPI1_D0 0x3AC 300 #define SPI1_CS0 0x3B0 301 #define SPI1_CS1 0x3B4 302 #define SPI1_CS2 0x3B8 303 #define SPI1_CS3 0x3BC 304 #define SPI2_SCLK 0x3C0 305 #define SPI2_D1 0x3C4 306 #define SPI2_D0 0x3C8 307 #define SPI2_CS0 0x3CC 308 #define DCAN1_TX 0x3D0 309 #define DCAN1_RX 0x3D4 310 #define DCAN2_TX 0x3D8 311 #define DCAN2_RX 0x3DC 312 #define UART1_RXD 0x3E0 313 #define UART1_TXD 0x3E4 314 #define UART1_CTSN 0x3E8 315 #define UART1_RTSN 0x3EC 316 #define UART2_RXD 0x3F0 317 #define UART2_TXD 0x3F4 318 #define UART2_CTSN 0x3F8 319 #define UART2_RTSN 0x3FC 320 #define I2C1_SDA 0x400 321 #define I2C1_SCL 0x404 322 #define I2C2_SDA 0x408 323 #define I2C2_SCL 0x40C 324 #define I2C3_SDA 0x410 325 #define I2C3_SCL 0x414 326 #define WAKEUP0 0x418 327 #define WAKEUP1 0x41C 328 #define WAKEUP2 0x420 329 #define WAKEUP3 0x424 330 #define ON_OFF 0x428 331 #define RTC_PORZ 0x42C 332 #define TMS 0x430 333 #define TDI 0x434 334 #define TDO 0x438 335 #define TCLK 0x43C 336 #define TRSTN 0x440 337 #define RTCK 0x444 338 #define EMU0 0x448 339 #define EMU1 0x44C 340 #define EMU2 0x450 341 #define EMU3 0x454 342 #define EMU4 0x458 343 #define RESETN 0x45C 344 #define NMIN 0x460 345 #define RSTOUTN 0x464 346 347 #endif /* _MUX_DRA7XX_H_ */ 348