1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated 4 * 5 * Nishant Kamat <nskamat@ti.com> 6 * Lokesh Vutla <lokeshvutla@ti.com> 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 #ifndef _MUX_DRA7XX_H_ 27 #define _MUX_DRA7XX_H_ 28 29 #include <asm/types.h> 30 31 #define IEN (1 << 18) 32 #define IDIS (0 << 18) 33 34 #define PTU (3 << 16) 35 #define PTD (1 << 16) 36 #define PEN (1 << 16) 37 #define PDIS (0 << 16) 38 39 #define WKEN (1 << 24) 40 #define WKDIS (0 << 24) 41 42 #define M0 0 43 #define M1 1 44 #define M2 2 45 #define M3 3 46 #define M4 4 47 #define M5 5 48 #define M6 6 49 #define M7 7 50 #define M8 8 51 #define M9 9 52 #define M10 10 53 #define M11 11 54 #define M12 12 55 #define M13 13 56 #define M14 14 57 #define M15 15 58 59 #define SAFE_MODE M15 60 61 #define GPMC_AD0 0x000 62 #define GPMC_AD1 0x004 63 #define GPMC_AD2 0x008 64 #define GPMC_AD3 0x00C 65 #define GPMC_AD4 0x010 66 #define GPMC_AD5 0x014 67 #define GPMC_AD6 0x018 68 #define GPMC_AD7 0x01C 69 #define GPMC_AD8 0x020 70 #define GPMC_AD9 0x024 71 #define GPMC_AD10 0x028 72 #define GPMC_AD11 0x02C 73 #define GPMC_AD12 0x030 74 #define GPMC_AD13 0x034 75 #define GPMC_AD14 0x038 76 #define GPMC_AD15 0x03C 77 #define GPMC_A0 0x040 78 #define GPMC_A1 0x044 79 #define GPMC_A2 0x048 80 #define GPMC_A3 0x04C 81 #define GPMC_A4 0x050 82 #define GPMC_A5 0x054 83 #define GPMC_A6 0x058 84 #define GPMC_A7 0x05C 85 #define GPMC_A8 0x060 86 #define GPMC_A9 0x064 87 #define GPMC_A10 0x068 88 #define GPMC_A11 0x06C 89 #define GPMC_A12 0x070 90 #define GPMC_A13 0x074 91 #define GPMC_A14 0x078 92 #define GPMC_A15 0x07C 93 #define GPMC_A16 0x080 94 #define GPMC_A17 0x084 95 #define GPMC_A18 0x088 96 #define GPMC_A19 0x08C 97 #define GPMC_A20 0x090 98 #define GPMC_A21 0x094 99 #define GPMC_A22 0x098 100 #define GPMC_A23 0x09C 101 #define GPMC_A24 0x0A0 102 #define GPMC_A25 0x0A4 103 #define GPMC_A26 0x0A8 104 #define GPMC_A27 0x0AC 105 #define GPMC_CS1 0x0B0 106 #define GPMC_CS0 0x0B4 107 #define GPMC_CS2 0x0B8 108 #define GPMC_CS3 0x0BC 109 #define GPMC_CLK 0x0C0 110 #define GPMC_ADVN_ALE 0x0C4 111 #define GPMC_OEN_REN 0x0C8 112 #define GPMC_WEN 0x0CC 113 #define GPMC_BEN0 0x0D0 114 #define GPMC_BEN1 0x0D4 115 #define GPMC_WAIT0 0x0D8 116 #define VIN1A_CLK0 0x0DC 117 #define VIN1B_CLK1 0x0E0 118 #define VIN1A_DE0 0x0E4 119 #define VIN1A_FLD0 0x0E8 120 #define VIN1A_HSYNC0 0x0EC 121 #define VIN1A_VSYNC0 0x0F0 122 #define VIN1A_D0 0x0F4 123 #define VIN1A_D1 0x0F8 124 #define VIN1A_D2 0x0FC 125 #define VIN1A_D3 0x100 126 #define VIN1A_D4 0x104 127 #define VIN1A_D5 0x108 128 #define VIN1A_D6 0x10C 129 #define VIN1A_D7 0x110 130 #define VIN1A_D8 0x114 131 #define VIN1A_D9 0x118 132 #define VIN1A_D10 0x11C 133 #define VIN1A_D11 0x120 134 #define VIN1A_D12 0x124 135 #define VIN1A_D13 0x128 136 #define VIN1A_D14 0x12C 137 #define VIN1A_D15 0x130 138 #define VIN1A_D16 0x134 139 #define VIN1A_D17 0x138 140 #define VIN1A_D18 0x13C 141 #define VIN1A_D19 0x140 142 #define VIN1A_D20 0x144 143 #define VIN1A_D21 0x148 144 #define VIN1A_D22 0x14C 145 #define VIN1A_D23 0x150 146 #define VIN2A_CLK0 0x154 147 #define VIN2A_DE0 0x158 148 #define VIN2A_FLD0 0x15C 149 #define VIN2A_HSYNC0 0x160 150 #define VIN2A_VSYNC0 0x164 151 #define VIN2A_D0 0x168 152 #define VIN2A_D1 0x16C 153 #define VIN2A_D2 0x170 154 #define VIN2A_D3 0x174 155 #define VIN2A_D4 0x178 156 #define VIN2A_D5 0x17C 157 #define VIN2A_D6 0x180 158 #define VIN2A_D7 0x184 159 #define VIN2A_D8 0x188 160 #define VIN2A_D9 0x18C 161 #define VIN2A_D10 0x190 162 #define VIN2A_D11 0x194 163 #define VIN2A_D12 0x198 164 #define VIN2A_D13 0x19C 165 #define VIN2A_D14 0x1A0 166 #define VIN2A_D15 0x1A4 167 #define VIN2A_D16 0x1A8 168 #define VIN2A_D17 0x1AC 169 #define VIN2A_D18 0x1B0 170 #define VIN2A_D19 0x1B4 171 #define VIN2A_D20 0x1B8 172 #define VIN2A_D21 0x1BC 173 #define VIN2A_D22 0x1C0 174 #define VIN2A_D23 0x1C4 175 #define VOUT1_CLK 0x1C8 176 #define VOUT1_DE 0x1CC 177 #define VOUT1_FLD 0x1D0 178 #define VOUT1_HSYNC 0x1D4 179 #define VOUT1_VSYNC 0x1D8 180 #define VOUT1_D0 0x1DC 181 #define VOUT1_D1 0x1E0 182 #define VOUT1_D2 0x1E4 183 #define VOUT1_D3 0x1E8 184 #define VOUT1_D4 0x1EC 185 #define VOUT1_D5 0x1F0 186 #define VOUT1_D6 0x1F4 187 #define VOUT1_D7 0x1F8 188 #define VOUT1_D8 0x1FC 189 #define VOUT1_D9 0x200 190 #define VOUT1_D10 0x204 191 #define VOUT1_D11 0x208 192 #define VOUT1_D12 0x20C 193 #define VOUT1_D13 0x210 194 #define VOUT1_D14 0x214 195 #define VOUT1_D15 0x218 196 #define VOUT1_D16 0x21C 197 #define VOUT1_D17 0x220 198 #define VOUT1_D18 0x224 199 #define VOUT1_D19 0x228 200 #define VOUT1_D20 0x22C 201 #define VOUT1_D21 0x230 202 #define VOUT1_D22 0x234 203 #define VOUT1_D23 0x238 204 #define MDIO_MCLK 0x23C 205 #define MDIO_D 0x240 206 #define RMII_MHZ_50_CLK 0x244 207 #define UART3_RXD 0x248 208 #define UART3_TXD 0x24C 209 #define RGMII0_TXC 0x250 210 #define RGMII0_TXCTL 0x254 211 #define RGMII0_TXD3 0x258 212 #define RGMII0_TXD2 0x25C 213 #define RGMII0_TXD1 0x260 214 #define RGMII0_TXD0 0x264 215 #define RGMII0_RXC 0x268 216 #define RGMII0_RXCTL 0x26C 217 #define RGMII0_RXD3 0x270 218 #define RGMII0_RXD2 0x274 219 #define RGMII0_RXD1 0x278 220 #define RGMII0_RXD0 0x27C 221 #define USB1_DRVVBUS 0x280 222 #define USB2_DRVVBUS 0x284 223 #define GPIO6_14 0x288 224 #define GPIO6_15 0x28C 225 #define GPIO6_16 0x290 226 #define XREF_CLK0 0x294 227 #define XREF_CLK1 0x298 228 #define XREF_CLK2 0x29C 229 #define XREF_CLK3 0x2A0 230 #define MCASP1_ACLKX 0x2A4 231 #define MCASP1_FSX 0x2A8 232 #define MCASP1_ACLKR 0x2AC 233 #define MCASP1_FSR 0x2B0 234 #define MCASP1_AXR0 0x2B4 235 #define MCASP1_AXR1 0x2B8 236 #define MCASP1_AXR2 0x2BC 237 #define MCASP1_AXR3 0x2C0 238 #define MCASP1_AXR4 0x2C4 239 #define MCASP1_AXR5 0x2C8 240 #define MCASP1_AXR6 0x2CC 241 #define MCASP1_AXR7 0x2D0 242 #define MCASP1_AXR8 0x2D4 243 #define MCASP1_AXR9 0x2D8 244 #define MCASP1_AXR10 0x2DC 245 #define MCASP1_AXR11 0x2E0 246 #define MCASP1_AXR12 0x2E4 247 #define MCASP1_AXR13 0x2E8 248 #define MCASP1_AXR14 0x2EC 249 #define MCASP1_AXR15 0x2F0 250 #define MCASP2_ACLKX 0x2F4 251 #define MCASP2_FSX 0x2F8 252 #define MCASP2_ACLKR 0x2FC 253 #define MCASP2_FSR 0x300 254 #define MCASP2_AXR0 0x304 255 #define MCASP2_AXR1 0x308 256 #define MCASP2_AXR2 0x30C 257 #define MCASP2_AXR3 0x310 258 #define MCASP2_AXR4 0x314 259 #define MCASP2_AXR5 0x318 260 #define MCASP2_AXR6 0x31C 261 #define MCASP2_AXR7 0x320 262 #define MCASP3_ACLKX 0x324 263 #define MCASP3_FSX 0x328 264 #define MCASP3_AXR0 0x32C 265 #define MCASP3_AXR1 0x330 266 #define MCASP4_ACLKX 0x334 267 #define MCASP4_FSX 0x338 268 #define MCASP4_AXR0 0x33C 269 #define MCASP4_AXR1 0x340 270 #define MCASP5_ACLKX 0x344 271 #define MCASP5_FSX 0x348 272 #define MCASP5_AXR0 0x34C 273 #define MCASP5_AXR1 0x350 274 #define MMC1_CLK 0x354 275 #define MMC1_CMD 0x358 276 #define MMC1_DAT0 0x35C 277 #define MMC1_DAT1 0x360 278 #define MMC1_DAT2 0x364 279 #define MMC1_DAT3 0x368 280 #define MMC1_SDCD 0x36C 281 #define MMC1_SDWP 0x370 282 #define GPIO6_10 0x374 283 #define GPIO6_11 0x378 284 #define MMC3_CLK 0x37C 285 #define MMC3_CMD 0x380 286 #define MMC3_DAT0 0x384 287 #define MMC3_DAT1 0x388 288 #define MMC3_DAT2 0x38C 289 #define MMC3_DAT3 0x390 290 #define MMC3_DAT4 0x394 291 #define MMC3_DAT5 0x398 292 #define MMC3_DAT6 0x39C 293 #define MMC3_DAT7 0x3A0 294 #define SPI1_SCLK 0x3A4 295 #define SPI1_D1 0x3A8 296 #define SPI1_D0 0x3AC 297 #define SPI1_CS0 0x3B0 298 #define SPI1_CS1 0x3B4 299 #define SPI1_CS2 0x3B8 300 #define SPI1_CS3 0x3BC 301 #define SPI2_SCLK 0x3C0 302 #define SPI2_D1 0x3C4 303 #define SPI2_D0 0x3C8 304 #define SPI2_CS0 0x3CC 305 #define DCAN1_TX 0x3D0 306 #define DCAN1_RX 0x3D4 307 #define DCAN2_TX 0x3D8 308 #define DCAN2_RX 0x3DC 309 #define UART1_RXD 0x3E0 310 #define UART1_TXD 0x3E4 311 #define UART1_CTSN 0x3E8 312 #define UART1_RTSN 0x3EC 313 #define UART2_RXD 0x3F0 314 #define UART2_TXD 0x3F4 315 #define UART2_CTSN 0x3F8 316 #define UART2_RTSN 0x3FC 317 #define I2C1_SDA 0x400 318 #define I2C1_SCL 0x404 319 #define I2C2_SDA 0x408 320 #define I2C2_SCL 0x40C 321 #define I2C3_SDA 0x410 322 #define I2C3_SCL 0x414 323 #define WAKEUP0 0x418 324 #define WAKEUP1 0x41C 325 #define WAKEUP2 0x420 326 #define WAKEUP3 0x424 327 #define ON_OFF 0x428 328 #define RTC_PORZ 0x42C 329 #define TMS 0x430 330 #define TDI 0x434 331 #define TDO 0x438 332 #define TCLK 0x43C 333 #define TRSTN 0x440 334 #define RTCK 0x444 335 #define EMU0 0x448 336 #define EMU1 0x44C 337 #define EMU2 0x450 338 #define EMU3 0x454 339 #define EMU4 0x458 340 #define RESETN 0x45C 341 #define NMIN 0x460 342 #define RSTOUTN 0x464 343 344 #endif /* _MUX_DRA7XX_H_ */ 345