1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated 4 * 5 * Nishant Kamat <nskamat@ti.com> 6 * Lokesh Vutla <lokeshvutla@ti.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 #ifndef _MUX_DRA7XX_H_ 11 #define _MUX_DRA7XX_H_ 12 13 #include <asm/types.h> 14 15 #define FSC (1 << 19) 16 #define SSC (0 << 19) 17 18 #define IEN (1 << 18) 19 #define IDIS (0 << 18) 20 21 #define PTU (1 << 17) 22 #define PTD (0 << 17) 23 #define PEN (1 << 16) 24 #define PDIS (0 << 16) 25 26 #define WKEN (1 << 24) 27 #define WKDIS (0 << 24) 28 29 #define M0 0 30 #define M1 1 31 #define M2 2 32 #define M3 3 33 #define M4 4 34 #define M5 5 35 #define M6 6 36 #define M7 7 37 #define M8 8 38 #define M9 9 39 #define M10 10 40 #define M11 11 41 #define M12 12 42 #define M13 13 43 #define M14 14 44 #define M15 15 45 46 #define SAFE_MODE M15 47 48 #define GPMC_AD0 0x000 49 #define GPMC_AD1 0x004 50 #define GPMC_AD2 0x008 51 #define GPMC_AD3 0x00C 52 #define GPMC_AD4 0x010 53 #define GPMC_AD5 0x014 54 #define GPMC_AD6 0x018 55 #define GPMC_AD7 0x01C 56 #define GPMC_AD8 0x020 57 #define GPMC_AD9 0x024 58 #define GPMC_AD10 0x028 59 #define GPMC_AD11 0x02C 60 #define GPMC_AD12 0x030 61 #define GPMC_AD13 0x034 62 #define GPMC_AD14 0x038 63 #define GPMC_AD15 0x03C 64 #define GPMC_A0 0x040 65 #define GPMC_A1 0x044 66 #define GPMC_A2 0x048 67 #define GPMC_A3 0x04C 68 #define GPMC_A4 0x050 69 #define GPMC_A5 0x054 70 #define GPMC_A6 0x058 71 #define GPMC_A7 0x05C 72 #define GPMC_A8 0x060 73 #define GPMC_A9 0x064 74 #define GPMC_A10 0x068 75 #define GPMC_A11 0x06C 76 #define GPMC_A12 0x070 77 #define GPMC_A13 0x074 78 #define GPMC_A14 0x078 79 #define GPMC_A15 0x07C 80 #define GPMC_A16 0x080 81 #define GPMC_A17 0x084 82 #define GPMC_A18 0x088 83 #define GPMC_A19 0x08C 84 #define GPMC_A20 0x090 85 #define GPMC_A21 0x094 86 #define GPMC_A22 0x098 87 #define GPMC_A23 0x09C 88 #define GPMC_A24 0x0A0 89 #define GPMC_A25 0x0A4 90 #define GPMC_A26 0x0A8 91 #define GPMC_A27 0x0AC 92 #define GPMC_CS1 0x0B0 93 #define GPMC_CS0 0x0B4 94 #define GPMC_CS2 0x0B8 95 #define GPMC_CS3 0x0BC 96 #define GPMC_CLK 0x0C0 97 #define GPMC_ADVN_ALE 0x0C4 98 #define GPMC_OEN_REN 0x0C8 99 #define GPMC_WEN 0x0CC 100 #define GPMC_BEN0 0x0D0 101 #define GPMC_BEN1 0x0D4 102 #define GPMC_WAIT0 0x0D8 103 #define VIN1A_CLK0 0x0DC 104 #define VIN1B_CLK1 0x0E0 105 #define VIN1A_DE0 0x0E4 106 #define VIN1A_FLD0 0x0E8 107 #define VIN1A_HSYNC0 0x0EC 108 #define VIN1A_VSYNC0 0x0F0 109 #define VIN1A_D0 0x0F4 110 #define VIN1A_D1 0x0F8 111 #define VIN1A_D2 0x0FC 112 #define VIN1A_D3 0x100 113 #define VIN1A_D4 0x104 114 #define VIN1A_D5 0x108 115 #define VIN1A_D6 0x10C 116 #define VIN1A_D7 0x110 117 #define VIN1A_D8 0x114 118 #define VIN1A_D9 0x118 119 #define VIN1A_D10 0x11C 120 #define VIN1A_D11 0x120 121 #define VIN1A_D12 0x124 122 #define VIN1A_D13 0x128 123 #define VIN1A_D14 0x12C 124 #define VIN1A_D15 0x130 125 #define VIN1A_D16 0x134 126 #define VIN1A_D17 0x138 127 #define VIN1A_D18 0x13C 128 #define VIN1A_D19 0x140 129 #define VIN1A_D20 0x144 130 #define VIN1A_D21 0x148 131 #define VIN1A_D22 0x14C 132 #define VIN1A_D23 0x150 133 #define VIN2A_CLK0 0x154 134 #define VIN2A_DE0 0x158 135 #define VIN2A_FLD0 0x15C 136 #define VIN2A_HSYNC0 0x160 137 #define VIN2A_VSYNC0 0x164 138 #define VIN2A_D0 0x168 139 #define VIN2A_D1 0x16C 140 #define VIN2A_D2 0x170 141 #define VIN2A_D3 0x174 142 #define VIN2A_D4 0x178 143 #define VIN2A_D5 0x17C 144 #define VIN2A_D6 0x180 145 #define VIN2A_D7 0x184 146 #define VIN2A_D8 0x188 147 #define VIN2A_D9 0x18C 148 #define VIN2A_D10 0x190 149 #define VIN2A_D11 0x194 150 #define VIN2A_D12 0x198 151 #define VIN2A_D13 0x19C 152 #define VIN2A_D14 0x1A0 153 #define VIN2A_D15 0x1A4 154 #define VIN2A_D16 0x1A8 155 #define VIN2A_D17 0x1AC 156 #define VIN2A_D18 0x1B0 157 #define VIN2A_D19 0x1B4 158 #define VIN2A_D20 0x1B8 159 #define VIN2A_D21 0x1BC 160 #define VIN2A_D22 0x1C0 161 #define VIN2A_D23 0x1C4 162 #define VOUT1_CLK 0x1C8 163 #define VOUT1_DE 0x1CC 164 #define VOUT1_FLD 0x1D0 165 #define VOUT1_HSYNC 0x1D4 166 #define VOUT1_VSYNC 0x1D8 167 #define VOUT1_D0 0x1DC 168 #define VOUT1_D1 0x1E0 169 #define VOUT1_D2 0x1E4 170 #define VOUT1_D3 0x1E8 171 #define VOUT1_D4 0x1EC 172 #define VOUT1_D5 0x1F0 173 #define VOUT1_D6 0x1F4 174 #define VOUT1_D7 0x1F8 175 #define VOUT1_D8 0x1FC 176 #define VOUT1_D9 0x200 177 #define VOUT1_D10 0x204 178 #define VOUT1_D11 0x208 179 #define VOUT1_D12 0x20C 180 #define VOUT1_D13 0x210 181 #define VOUT1_D14 0x214 182 #define VOUT1_D15 0x218 183 #define VOUT1_D16 0x21C 184 #define VOUT1_D17 0x220 185 #define VOUT1_D18 0x224 186 #define VOUT1_D19 0x228 187 #define VOUT1_D20 0x22C 188 #define VOUT1_D21 0x230 189 #define VOUT1_D22 0x234 190 #define VOUT1_D23 0x238 191 #define MDIO_MCLK 0x23C 192 #define MDIO_D 0x240 193 #define RMII_MHZ_50_CLK 0x244 194 #define UART3_RXD 0x248 195 #define UART3_TXD 0x24C 196 #define RGMII0_TXC 0x250 197 #define RGMII0_TXCTL 0x254 198 #define RGMII0_TXD3 0x258 199 #define RGMII0_TXD2 0x25C 200 #define RGMII0_TXD1 0x260 201 #define RGMII0_TXD0 0x264 202 #define RGMII0_RXC 0x268 203 #define RGMII0_RXCTL 0x26C 204 #define RGMII0_RXD3 0x270 205 #define RGMII0_RXD2 0x274 206 #define RGMII0_RXD1 0x278 207 #define RGMII0_RXD0 0x27C 208 #define USB1_DRVVBUS 0x280 209 #define USB2_DRVVBUS 0x284 210 #define GPIO6_14 0x288 211 #define GPIO6_15 0x28C 212 #define GPIO6_16 0x290 213 #define XREF_CLK0 0x294 214 #define XREF_CLK1 0x298 215 #define XREF_CLK2 0x29C 216 #define XREF_CLK3 0x2A0 217 #define MCASP1_ACLKX 0x2A4 218 #define MCASP1_FSX 0x2A8 219 #define MCASP1_ACLKR 0x2AC 220 #define MCASP1_FSR 0x2B0 221 #define MCASP1_AXR0 0x2B4 222 #define MCASP1_AXR1 0x2B8 223 #define MCASP1_AXR2 0x2BC 224 #define MCASP1_AXR3 0x2C0 225 #define MCASP1_AXR4 0x2C4 226 #define MCASP1_AXR5 0x2C8 227 #define MCASP1_AXR6 0x2CC 228 #define MCASP1_AXR7 0x2D0 229 #define MCASP1_AXR8 0x2D4 230 #define MCASP1_AXR9 0x2D8 231 #define MCASP1_AXR10 0x2DC 232 #define MCASP1_AXR11 0x2E0 233 #define MCASP1_AXR12 0x2E4 234 #define MCASP1_AXR13 0x2E8 235 #define MCASP1_AXR14 0x2EC 236 #define MCASP1_AXR15 0x2F0 237 #define MCASP2_ACLKX 0x2F4 238 #define MCASP2_FSX 0x2F8 239 #define MCASP2_ACLKR 0x2FC 240 #define MCASP2_FSR 0x300 241 #define MCASP2_AXR0 0x304 242 #define MCASP2_AXR1 0x308 243 #define MCASP2_AXR2 0x30C 244 #define MCASP2_AXR3 0x310 245 #define MCASP2_AXR4 0x314 246 #define MCASP2_AXR5 0x318 247 #define MCASP2_AXR6 0x31C 248 #define MCASP2_AXR7 0x320 249 #define MCASP3_ACLKX 0x324 250 #define MCASP3_FSX 0x328 251 #define MCASP3_AXR0 0x32C 252 #define MCASP3_AXR1 0x330 253 #define MCASP4_ACLKX 0x334 254 #define MCASP4_FSX 0x338 255 #define MCASP4_AXR0 0x33C 256 #define MCASP4_AXR1 0x340 257 #define MCASP5_ACLKX 0x344 258 #define MCASP5_FSX 0x348 259 #define MCASP5_AXR0 0x34C 260 #define MCASP5_AXR1 0x350 261 #define MMC1_CLK 0x354 262 #define MMC1_CMD 0x358 263 #define MMC1_DAT0 0x35C 264 #define MMC1_DAT1 0x360 265 #define MMC1_DAT2 0x364 266 #define MMC1_DAT3 0x368 267 #define MMC1_SDCD 0x36C 268 #define MMC1_SDWP 0x370 269 #define GPIO6_10 0x374 270 #define GPIO6_11 0x378 271 #define MMC3_CLK 0x37C 272 #define MMC3_CMD 0x380 273 #define MMC3_DAT0 0x384 274 #define MMC3_DAT1 0x388 275 #define MMC3_DAT2 0x38C 276 #define MMC3_DAT3 0x390 277 #define MMC3_DAT4 0x394 278 #define MMC3_DAT5 0x398 279 #define MMC3_DAT6 0x39C 280 #define MMC3_DAT7 0x3A0 281 #define SPI1_SCLK 0x3A4 282 #define SPI1_D1 0x3A8 283 #define SPI1_D0 0x3AC 284 #define SPI1_CS0 0x3B0 285 #define SPI1_CS1 0x3B4 286 #define SPI1_CS2 0x3B8 287 #define SPI1_CS3 0x3BC 288 #define SPI2_SCLK 0x3C0 289 #define SPI2_D1 0x3C4 290 #define SPI2_D0 0x3C8 291 #define SPI2_CS0 0x3CC 292 #define DCAN1_TX 0x3D0 293 #define DCAN1_RX 0x3D4 294 #define DCAN2_TX 0x3D8 295 #define DCAN2_RX 0x3DC 296 #define UART1_RXD 0x3E0 297 #define UART1_TXD 0x3E4 298 #define UART1_CTSN 0x3E8 299 #define UART1_RTSN 0x3EC 300 #define UART2_RXD 0x3F0 301 #define UART2_TXD 0x3F4 302 #define UART2_CTSN 0x3F8 303 #define UART2_RTSN 0x3FC 304 #define I2C1_SDA 0x400 305 #define I2C1_SCL 0x404 306 #define I2C2_SDA 0x408 307 #define I2C2_SCL 0x40C 308 #define I2C3_SDA 0x410 309 #define I2C3_SCL 0x414 310 #define WAKEUP0 0x418 311 #define WAKEUP1 0x41C 312 #define WAKEUP2 0x420 313 #define WAKEUP3 0x424 314 #define ON_OFF 0x428 315 #define RTC_PORZ 0x42C 316 #define TMS 0x430 317 #define TDI 0x434 318 #define TDO 0x438 319 #define TCLK 0x43C 320 #define TRSTN 0x440 321 #define RTCK 0x444 322 #define EMU0 0x448 323 #define EMU1 0x44C 324 #define EMU2 0x450 325 #define EMU3 0x454 326 #define EMU4 0x458 327 #define RESETN 0x45C 328 #define NMIN 0x460 329 #define RSTOUTN 0x464 330 331 #endif /* _MUX_DRA7XX_H_ */ 332