1 /*
2  * (C) Copyright 2010
3  * Texas Instruments, <www.ti.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _SYS_PROTO_H_
9 #define _SYS_PROTO_H_
10 
11 #include <asm/arch/omap.h>
12 #include <asm/arch/clock.h>
13 #include <asm/io.h>
14 #include <asm/omap_common.h>
15 #include <asm/arch/mux_omap4.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 struct omap_sysinfo {
20 	char *board_string;
21 };
22 extern const struct omap_sysinfo sysinfo;
23 
24 void gpmc_init(void);
25 void watchdog_init(void);
26 u32 get_device_type(void);
27 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
28 void set_muxconf_regs_essential(void);
29 void set_muxconf_regs_non_essential(void);
30 void sr32(void *, u32, u32, u32);
31 u32 wait_on_value(u32, u32, void *, u32);
32 void sdelay(unsigned long);
33 void set_pl310_ctrl_reg(u32 val);
34 void setup_clocks_for_console(void);
35 void prcm_init(void);
36 void bypass_dpll(u32 const base);
37 void freq_update_core(void);
38 u32 get_sys_clk_freq(void);
39 u32 omap4_ddr_clk(void);
40 void cancel_out(u32 *num, u32 *den, u32 den_limit);
41 void sdram_init(void);
42 u32 omap_sdram_size(void);
43 u32 cortex_rev(void);
44 void save_omap_boot_params(void);
45 void init_omap_revision(void);
46 void do_io_settings(void);
47 void sri2c_init(void);
48 void gpi2c_init(void);
49 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
50 u32 warm_reset(void);
51 void force_emif_self_refresh(void);
52 void setup_warmreset_time(void);
53 
54 static inline u32 running_from_sdram(void)
55 {
56 	u32 pc;
57 	asm volatile ("mov %0, pc" : "=r" (pc));
58 	return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
59 	    (pc < OMAP44XX_DRAM_ADDR_SPACE_END));
60 }
61 
62 static inline u8 uboot_loaded_by_spl(void)
63 {
64 	/*
65 	 * u-boot can be running from sdram either because of configuration
66 	 * Header or by SPL. If because of CH, then the romcode sets the
67 	 * CHSETTINGS executed bit to true in the boot parameter structure that
68 	 * it passes to the bootloader.This parameter is stored in the ch_flags
69 	 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
70 	 * mandatory section if CH is present.
71 	 */
72 	if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
73 		return 0;
74 	else
75 		return running_from_sdram();
76 }
77 /*
78  * The basic hardware init of OMAP(s_init()) can happen in 4
79  * different contexts:
80  *  1. SPL running from SRAM
81  *  2. U-Boot running from FLASH
82  *  3. Non-XIP U-Boot loaded to SDRAM by SPL
83  *  4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
84  *     Configuration Header feature
85  *
86  * This function finds this context.
87  * Defining as inline may help in compiling out unused functions in SPL
88  */
89 static inline u32 omap_hw_init_context(void)
90 {
91 #ifdef CONFIG_SPL_BUILD
92 	return OMAP_INIT_CONTEXT_SPL;
93 #else
94 	if (uboot_loaded_by_spl())
95 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
96 	else if (running_from_sdram())
97 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
98 	else
99 		return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
100 #endif
101 }
102 
103 #endif
104