1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2010 4 * Texas Instruments, <www.ti.com> 5 */ 6 7 #ifndef _SYS_PROTO_H_ 8 #define _SYS_PROTO_H_ 9 10 #include <asm/arch/omap.h> 11 #include <asm/arch/clock.h> 12 #include <asm/io.h> 13 #include <asm/omap_common.h> 14 #include <linux/mtd/omap_gpmc.h> 15 #include <asm/arch/mux_omap4.h> 16 #include <asm/ti-common/sys_proto.h> 17 18 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 19 extern const struct emif_regs emif_regs_elpida_200_mhz_2cs; 20 extern const struct emif_regs emif_regs_elpida_380_mhz_1cs; 21 extern const struct emif_regs emif_regs_elpida_400_mhz_1cs; 22 extern const struct emif_regs emif_regs_elpida_400_mhz_2cs; 23 extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2; 24 extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2; 25 extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2; 26 #else 27 extern const struct lpddr2_device_details elpida_2G_S4_details; 28 extern const struct lpddr2_device_details elpida_4G_S4_details; 29 #endif 30 31 #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS 32 extern const struct lpddr2_device_timings jedec_default_timings; 33 #else 34 extern const struct lpddr2_device_timings elpida_2G_S4_timings; 35 #endif 36 37 struct omap_sysinfo { 38 char *board_string; 39 }; 40 extern const struct omap_sysinfo sysinfo; 41 42 void gpmc_init(void); 43 void watchdog_init(void); 44 u32 get_device_type(void); 45 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); 46 void set_muxconf_regs(void); 47 u32 wait_on_value(u32, u32, void *, u32); 48 void sdelay(unsigned long); 49 void setup_early_clocks(void); 50 void prcm_init(void); 51 void do_board_detect(void); 52 void bypass_dpll(u32 const base); 53 void freq_update_core(void); 54 u32 get_sys_clk_freq(void); 55 u32 omap4_ddr_clk(void); 56 void cancel_out(u32 *num, u32 *den, u32 den_limit); 57 void sdram_init(void); 58 u32 omap_sdram_size(void); 59 u32 cortex_rev(void); 60 void save_omap_boot_params(void); 61 void init_omap_revision(void); 62 void do_io_settings(void); 63 void sri2c_init(void); 64 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); 65 u32 warm_reset(void); 66 void force_emif_self_refresh(void); 67 void setup_warmreset_time(void); 68 69 #define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102 70 71 #endif 72