1 /*
2  * (C) Copyright 2010
3  * Texas Instruments, <www.ti.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA
19  */
20 
21 #ifndef _SYS_PROTO_H_
22 #define _SYS_PROTO_H_
23 
24 #include <asm/arch/omap4.h>
25 #include <asm/arch/clocks.h>
26 #include <asm/io.h>
27 #include <asm/omap_common.h>
28 #include <asm/arch/mux_omap4.h>
29 
30 struct omap_sysinfo {
31 	char *board_string;
32 };
33 extern const struct omap_sysinfo sysinfo;
34 
35 extern struct omap4_prcm_regs *const prcm;
36 
37 void gpmc_init(void);
38 void watchdog_init(void);
39 u32 get_device_type(void);
40 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
41 void set_muxconf_regs_non_essential(void);
42 void sr32(void *, u32, u32, u32);
43 u32 wait_on_value(u32, u32, void *, u32);
44 void sdelay(unsigned long);
45 void set_pl310_ctrl_reg(u32 val);
46 void setup_clocks_for_console(void);
47 void prcm_init(void);
48 void bypass_dpll(u32 *const base);
49 void freq_update_core(void);
50 u32 get_sys_clk_freq(void);
51 u32 omap4_ddr_clk(void);
52 void cancel_out(u32 *num, u32 *den, u32 den_limit);
53 void sdram_init(void);
54 u32 omap4_sdram_size(void);
55 
56 static inline u32 running_from_sdram(void)
57 {
58 	u32 pc;
59 	asm volatile ("mov %0, pc" : "=r" (pc));
60 	return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
61 	    (pc < OMAP44XX_DRAM_ADDR_SPACE_END));
62 }
63 
64 static inline u8 uboot_loaded_by_spl(void)
65 {
66 	/*
67 	 * Configuration Header is not supported yet, so u-boot init running
68 	 * from SDRAM implies that it was loaded by SPL. When this situation
69 	 * changes one of these approaches could be taken:
70 	 * i.  Pass a magic from SPL to U-Boot and U-Boot save it at a known
71 	 *     location.
72 	 * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
73 	 *     the DPLLs at 100% OPP.
74 	 */
75 	return running_from_sdram();
76 }
77 /*
78  * The basic hardware init of OMAP(s_init()) can happen in 4
79  * different contexts:
80  *  1. SPL running from SRAM
81  *  2. U-Boot running from FLASH
82  *  3. Non-XIP U-Boot loaded to SDRAM by SPL
83  *  4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
84  *     Configuration Header feature
85  *
86  * This function finds this context.
87  * Defining as inline may help in compiling out unused functions in SPL
88  */
89 static inline u32 omap4_hw_init_context(void)
90 {
91 #ifdef CONFIG_SPL_BUILD
92 	return OMAP_INIT_CONTEXT_SPL;
93 #else
94 	if (uboot_loaded_by_spl())
95 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
96 	else if (running_from_sdram())
97 		return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
98 	else
99 		return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
100 #endif
101 }
102 
103 static inline u32 omap_revision(void)
104 {
105 	extern u32 *const omap4_revision;
106 	return *omap4_revision;
107 }
108 
109 #endif
110