1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2c2b626c1SLuca Ceresoli /* 3c2b626c1SLuca Ceresoli * (c) 2011 Comelit Group SpA, Luca Ceresoli <luca.ceresoli@comelit.it> 4c2b626c1SLuca Ceresoli */ 5c2b626c1SLuca Ceresoli 6c2b626c1SLuca Ceresoli #ifndef _OMAP3_REGS_H 7c2b626c1SLuca Ceresoli #define _OMAP3_REGS_H 8c2b626c1SLuca Ceresoli 9c2b626c1SLuca Ceresoli /* 10c2b626c1SLuca Ceresoli * Register definitions for OMAP3 processors. 11c2b626c1SLuca Ceresoli */ 12c2b626c1SLuca Ceresoli 13c2b626c1SLuca Ceresoli /* 14c2b626c1SLuca Ceresoli * GPMC_CONFIG1 - GPMC_CONFIG7 15c2b626c1SLuca Ceresoli */ 16c2b626c1SLuca Ceresoli 17c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG1 - signal control parameters */ 18c2b626c1SLuca Ceresoli #define WRAPBURST (1 << 31) 19c2b626c1SLuca Ceresoli #define READMULTIPLE (1 << 30) 20c2b626c1SLuca Ceresoli #define READTYPE (1 << 29) 21c2b626c1SLuca Ceresoli #define WRITEMULTIPLE (1 << 28) 22c2b626c1SLuca Ceresoli #define WRITETYPE (1 << 27) 23c2b626c1SLuca Ceresoli #define CLKACTIVATIONTIME(x) (((x) & 3) << 25) 24c2b626c1SLuca Ceresoli #define ATTACHEDDEVICEPAGELENGTH(x) (((x) & 3) << 23) 25c2b626c1SLuca Ceresoli #define WAITREADMONITORING (1 << 22) 26c2b626c1SLuca Ceresoli #define WAITWRITEMONITORING (1 << 21) 27c2b626c1SLuca Ceresoli #define WAITMONITORINGTIME(x) (((x) & 3) << 18) 28c2b626c1SLuca Ceresoli #define WAITPINSELECT(x) (((x) & 3) << 16) 29c2b626c1SLuca Ceresoli #define DEVICESIZE(x) (((x) & 3) << 12) 30c2b626c1SLuca Ceresoli #define DEVICESIZE_8BIT DEVICESIZE(0) 31c2b626c1SLuca Ceresoli #define DEVICESIZE_16BIT DEVICESIZE(1) 32c2b626c1SLuca Ceresoli #define DEVICETYPE(x) (((x) & 3) << 10) 33c2b626c1SLuca Ceresoli #define DEVICETYPE_NOR DEVICETYPE(0) 34c2b626c1SLuca Ceresoli #define DEVICETYPE_NAND DEVICETYPE(2) 35c2b626c1SLuca Ceresoli #define MUXADDDATA (1 << 9) 36c2b626c1SLuca Ceresoli #define TIMEPARAGRANULARITY (1 << 4) 37c2b626c1SLuca Ceresoli #define GPMCFCLKDIVIDER(x) (((x) & 3) << 0) 38c2b626c1SLuca Ceresoli 39c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG2 - CS timing */ 40c2b626c1SLuca Ceresoli #define CSWROFFTIME(x) (((x) & 0x1f) << 16) 41c2b626c1SLuca Ceresoli #define CSRDOFFTIME(x) (((x) & 0x1f) << 8) 42c2b626c1SLuca Ceresoli #define CSEXTRADELAY (1 << 7) 43c2b626c1SLuca Ceresoli #define CSONTIME(x) (((x) & 0xf) << 0) 44c2b626c1SLuca Ceresoli 45c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG3 - nADV timing */ 46c2b626c1SLuca Ceresoli #define ADVWROFFTIME(x) (((x) & 0x1f) << 16) 47c2b626c1SLuca Ceresoli #define ADVRDOFFTIME(x) (((x) & 0x1f) << 8) 48c2b626c1SLuca Ceresoli #define ADVEXTRADELAY (1 << 7) 49c2b626c1SLuca Ceresoli #define ADVONTIME(x) (((x) & 0xf) << 0) 50c2b626c1SLuca Ceresoli 51c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG4 - nWE and nOE timing */ 52c2b626c1SLuca Ceresoli #define WEOFFTIME(x) (((x) & 0x1f) << 24) 53c2b626c1SLuca Ceresoli #define WEEXTRADELAY (1 << 23) 54c2b626c1SLuca Ceresoli #define WEONTIME(x) (((x) & 0xf) << 16) 55c2b626c1SLuca Ceresoli #define OEOFFTIME(x) (((x) & 0x1f) << 8) 56c2b626c1SLuca Ceresoli #define OEEXTRADELAY (1 << 7) 57c2b626c1SLuca Ceresoli #define OEONTIME(x) (((x) & 0xf) << 0) 58c2b626c1SLuca Ceresoli 59c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG5 - RdAccessTime and CycleTime timing */ 60c2b626c1SLuca Ceresoli #define PAGEBURSTACCESSTIME(x) (((x) & 0xf) << 24) 61c2b626c1SLuca Ceresoli #define RDACCESSTIME(x) (((x) & 0x1f) << 16) 62c2b626c1SLuca Ceresoli #define WRCYCLETIME(x) (((x) & 0x1f) << 8) 63c2b626c1SLuca Ceresoli #define RDCYCLETIME(x) (((x) & 0x1f) << 0) 64c2b626c1SLuca Ceresoli 65c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG6 - misc timings */ 66c2b626c1SLuca Ceresoli #define WRACCESSTIME(x) (((x) & 0x1f) << 24) 67c2b626c1SLuca Ceresoli #define WRDATAONADMUXBUS(x) (((x) & 0xf) << 16) 68c2b626c1SLuca Ceresoli #define CYCLE2CYCLEDELAY(x) (((x) & 0xf) << 8) 69c2b626c1SLuca Ceresoli #define CYCLE2CYCLESAMECSEN (1 << 7) 70c2b626c1SLuca Ceresoli #define CYCLE2CYCLEDIFFCSEN (1 << 6) 71c2b626c1SLuca Ceresoli #define BUSTURNAROUND(x) (((x) & 0xf) << 0) 72c2b626c1SLuca Ceresoli 73c2b626c1SLuca Ceresoli /* Values for GPMC_CONFIG7 - CS address mapping configuration */ 74c2b626c1SLuca Ceresoli #define MASKADDRESS(x) (((x) & 0xf) << 8) 75c2b626c1SLuca Ceresoli #define CSVALID (1 << 6) 76c2b626c1SLuca Ceresoli #define BASEADDRESS(x) (((x) & 0x3f) << 0) 77c2b626c1SLuca Ceresoli 78c2b626c1SLuca Ceresoli #endif /* _OMAP3_REGS_H */ 79