1 /* 2 * am35x_def.h - TI's AM35x specific definitions. 3 * 4 * Based on arch/arm/include/asm/arch-omap3/cpu.h 5 * 6 * Author: Ajay Kumar Gupta <ajay.gupta@ti.com> 7 * 8 * Copyright (c) 2010 Texas Instruments Incorporated 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef _AM35X_DEF_H_ 26 #define _AM35X_DEF_H_ 27 28 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 29 #include <asm/types.h> 30 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ 31 32 #ifndef __KERNEL_STRICT_NAMES 33 #ifndef __ASSEMBLY__ 34 35 /* IP_SW_RESET bits */ 36 #define CPGMACSS_SW_RST (1 << 1) /* reset CPGMAC */ 37 38 /* General register mappings of system control module */ 39 #define AM35X_SCM_GEN_BASE 0x48002270 40 struct am35x_scm_general { 41 u32 res1[0xC4]; /* 0x000 - 0x30C */ 42 u32 devconf2; /* 0x310 */ 43 u32 devconf3; /* 0x314 */ 44 u32 res2[0x2]; /* 0x318 - 0x31C */ 45 u32 cba_priority; /* 0x320 */ 46 u32 lvl_intr_clr; /* 0x324 */ 47 u32 ip_sw_reset; /* 0x328 */ 48 u32 ipss_clk_ctrl; /* 0x32C */ 49 }; 50 #define am35x_scm_general_regs ((struct am35x_scm_general *)AM35X_SCM_GEN_BASE) 51 52 #endif /*__ASSEMBLY__ */ 53 #endif /* __KERNEL_STRICT_NAMES */ 54 55 #endif /* _AM35X_DEF_H_ */ 56