1 /* 2 * Freescale i.MX23/i.MX28 specific functions 3 * 4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 5 * on behalf of DENX Software Engineering GmbH 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __SYS_PROTO_H__ 11 #define __SYS_PROTO_H__ 12 13 int mxs_reset_block(struct mxs_register_32 *reg); 14 int mxs_wait_mask_set(struct mxs_register_32 *reg, 15 uint32_t mask, 16 unsigned int timeout); 17 int mxs_wait_mask_clr(struct mxs_register_32 *reg, 18 uint32_t mask, 19 unsigned int timeout); 20 21 int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)); 22 23 #ifdef CONFIG_SPL_BUILD 24 25 #if defined(CONFIG_MX23) 26 #include <asm/arch/iomux-mx23.h> 27 #elif defined(CONFIG_MX28) 28 #include <asm/arch/iomux-mx28.h> 29 #endif 30 31 void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr, 32 const iomux_cfg_t *iomux_setup, 33 const unsigned int iomux_size); 34 #endif 35 36 struct mxs_pair { 37 uint8_t boot_pads; 38 uint8_t boot_mask; 39 const char *mode; 40 }; 41 42 static const struct mxs_pair mxs_boot_modes[] = { 43 #if defined(CONFIG_MX23) 44 { 0x00, 0x0f, "USB" }, 45 { 0x01, 0x1f, "I2C, master" }, 46 { 0x02, 0x1f, "SSP SPI #1, master, NOR" }, 47 { 0x03, 0x1f, "SSP SPI #2, master, NOR" }, 48 { 0x04, 0x1f, "NAND" }, 49 { 0x06, 0x1f, "JTAG" }, 50 { 0x08, 0x1f, "SSP SPI #3, master, EEPROM" }, 51 { 0x09, 0x1f, "SSP SD/MMC #0" }, 52 { 0x0a, 0x1f, "SSP SD/MMC #1" }, 53 { 0x00, 0x00, "Reserved/Unknown/Wrong" }, 54 #elif defined(CONFIG_MX28) 55 { 0x00, 0x0f, "USB #0" }, 56 { 0x01, 0x1f, "I2C #0, master, 3V3" }, 57 { 0x11, 0x1f, "I2C #0, master, 1V8" }, 58 { 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" }, 59 { 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" }, 60 { 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" }, 61 { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" }, 62 { 0x04, 0x1f, "NAND, 3V3" }, 63 { 0x14, 0x1f, "NAND, 1V8" }, 64 { 0x06, 0x1f, "JTAG" }, 65 { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" }, 66 { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" }, 67 { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" }, 68 { 0x19, 0x1f, "SSP SD/MMC #0, 1V8" }, 69 { 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" }, 70 { 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" }, 71 { 0x00, 0x00, "Reserved/Unknown/Wrong" }, 72 #endif 73 }; 74 75 struct mxs_spl_data { 76 uint8_t boot_mode_idx; 77 uint32_t mem_dram_size; 78 }; 79 80 int mxs_dram_init(void); 81 82 #endif /* __SYS_PROTO_H__ */ 83