1 /* 2 * Freescale i.MX28 MX28 specific functions 3 * 4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 5 * on behalf of DENX Software Engineering GmbH 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #ifndef __MX28_H__ 24 #define __MX28_H__ 25 26 int mx28_reset_block(struct mxs_register_32 *reg); 27 int mx28_wait_mask_set(struct mxs_register_32 *reg, 28 uint32_t mask, 29 int timeout); 30 int mx28_wait_mask_clr(struct mxs_register_32 *reg, 31 uint32_t mask, 32 int timeout); 33 34 int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int)); 35 36 #ifdef CONFIG_SPL_BUILD 37 #include <asm/arch/iomux-mx28.h> 38 void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, 39 const unsigned int iomux_size); 40 #endif 41 42 struct mx28_pair { 43 uint8_t boot_pads; 44 uint8_t boot_mask; 45 const char *mode; 46 }; 47 48 static const struct mx28_pair mx28_boot_modes[] = { 49 { 0x00, 0x0f, "USB #0" }, 50 { 0x01, 0x1f, "I2C #0, master, 3V3" }, 51 { 0x11, 0x1f, "I2C #0, master, 1V8" }, 52 { 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" }, 53 { 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" }, 54 { 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" }, 55 { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" }, 56 { 0x04, 0x1f, "NAND, 3V3" }, 57 { 0x14, 0x1f, "NAND, 1V8" }, 58 { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" }, 59 { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" }, 60 { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" }, 61 { 0x19, 0x1f, "SSP SD/MMC #0, 1V8" }, 62 { 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" }, 63 { 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" }, 64 { 0x00, 0x00, "Reserved/Unknown/Wrong" }, 65 }; 66 67 struct mxs_spl_data { 68 uint8_t boot_mode_idx; 69 uint32_t mem_dram_size; 70 }; 71 72 int mx28_dram_init(void); 73 74 #endif /* __MX28_H__ */ 75