1 /*
2  * Freescale i.MX28 TIMROT Register Definitions
3  *
4  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * Based on code from LTIB:
7  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
22  *
23  */
24 
25 #ifndef __MX28_REGS_TIMROT_H__
26 #define __MX28_REGS_TIMROT_H__
27 
28 #include <asm/imx-common/regs-common.h>
29 
30 #ifndef	__ASSEMBLY__
31 struct mxs_timrot_regs {
32 	mxs_reg_32(hw_timrot_rotctrl)
33 	mxs_reg_32(hw_timrot_rotcount)
34 #if defined(CONFIG_MX23)
35 	mxs_reg_32(hw_timrot_timctrl0)
36 	mxs_reg_32(hw_timrot_timcount0)
37 	mxs_reg_32(hw_timrot_timctrl1)
38 	mxs_reg_32(hw_timrot_timcount1)
39 	mxs_reg_32(hw_timrot_timctrl2)
40 	mxs_reg_32(hw_timrot_timcount2)
41 	mxs_reg_32(hw_timrot_timctrl3)
42 	mxs_reg_32(hw_timrot_timcount3)
43 #elif defined(CONFIG_MX28)
44 	mxs_reg_32(hw_timrot_timctrl0)
45 	mxs_reg_32(hw_timrot_running_count0)
46 	mxs_reg_32(hw_timrot_fixed_count0)
47 	mxs_reg_32(hw_timrot_match_count0)
48 	mxs_reg_32(hw_timrot_timctrl1)
49 	mxs_reg_32(hw_timrot_running_count1)
50 	mxs_reg_32(hw_timrot_fixed_count1)
51 	mxs_reg_32(hw_timrot_match_count1)
52 	mxs_reg_32(hw_timrot_timctrl2)
53 	mxs_reg_32(hw_timrot_running_count2)
54 	mxs_reg_32(hw_timrot_fixed_count2)
55 	mxs_reg_32(hw_timrot_match_count2)
56 	mxs_reg_32(hw_timrot_timctrl3)
57 	mxs_reg_32(hw_timrot_running_count3)
58 	mxs_reg_32(hw_timrot_fixed_count3)
59 	mxs_reg_32(hw_timrot_match_count3)
60 #endif
61 	mxs_reg_32(hw_timrot_version)
62 };
63 #endif
64 
65 #define	TIMROT_ROTCTRL_SFTRST				(1 << 31)
66 #define	TIMROT_ROTCTRL_CLKGATE				(1 << 30)
67 #define	TIMROT_ROTCTRL_ROTARY_PRESENT			(1 << 29)
68 #define	TIMROT_ROTCTRL_TIM3_PRESENT			(1 << 28)
69 #define	TIMROT_ROTCTRL_TIM2_PRESENT			(1 << 27)
70 #define	TIMROT_ROTCTRL_TIM1_PRESENT			(1 << 26)
71 #define	TIMROT_ROTCTRL_TIM0_PRESENT			(1 << 25)
72 #define	TIMROT_ROTCTRL_STATE_MASK			(0x7 << 22)
73 #define	TIMROT_ROTCTRL_STATE_OFFSET			22
74 #define	TIMROT_ROTCTRL_DIVIDER_MASK			(0x3f << 16)
75 #define	TIMROT_ROTCTRL_DIVIDER_OFFSET			16
76 #define	TIMROT_ROTCTRL_RELATIVE				(1 << 12)
77 #define	TIMROT_ROTCTRL_OVERSAMPLE_MASK			(0x3 << 10)
78 #define	TIMROT_ROTCTRL_OVERSAMPLE_OFFSET		10
79 #define	TIMROT_ROTCTRL_OVERSAMPLE_8X			(0x0 << 10)
80 #define	TIMROT_ROTCTRL_OVERSAMPLE_4X			(0x1 << 10)
81 #define	TIMROT_ROTCTRL_OVERSAMPLE_2X			(0x2 << 10)
82 #define	TIMROT_ROTCTRL_OVERSAMPLE_1X			(0x3 << 10)
83 #define	TIMROT_ROTCTRL_POLARITY_B			(1 << 9)
84 #define	TIMROT_ROTCTRL_POLARITY_A			(1 << 8)
85 #if defined(CONFIG_MX23)
86 #define	TIMROT_ROTCTRL_SELECT_B_MASK			(0x7 << 4)
87 #elif defined(CONFIG_MX28)
88 #define	TIMROT_ROTCTRL_SELECT_B_MASK			(0xf << 4)
89 #endif
90 #define	TIMROT_ROTCTRL_SELECT_B_OFFSET			4
91 #define	TIMROT_ROTCTRL_SELECT_B_NEVER_TICK		(0x0 << 4)
92 #define	TIMROT_ROTCTRL_SELECT_B_PWM0			(0x1 << 4)
93 #define	TIMROT_ROTCTRL_SELECT_B_PWM1			(0x2 << 4)
94 #define	TIMROT_ROTCTRL_SELECT_B_PWM2			(0x3 << 4)
95 #define	TIMROT_ROTCTRL_SELECT_B_PWM3			(0x4 << 4)
96 #define	TIMROT_ROTCTRL_SELECT_B_PWM4			(0x5 << 4)
97 #if defined(CONFIG_MX23)
98 #define	TIMROT_ROTCTRL_SELECT_B_ROTARYA		(0x6 << 4)
99 #define	TIMROT_ROTCTRL_SELECT_B_ROTARYB		(0x7 << 4)
100 #elif defined(CONFIG_MX28)
101 #define	TIMROT_ROTCTRL_SELECT_B_PWM5			(0x6 << 4)
102 #define	TIMROT_ROTCTRL_SELECT_B_PWM6			(0x7 << 4)
103 #define	TIMROT_ROTCTRL_SELECT_B_PWM7			(0x8 << 4)
104 #define	TIMROT_ROTCTRL_SELECT_B_ROTARYA			(0x9 << 4)
105 #define	TIMROT_ROTCTRL_SELECT_B_ROTARYB			(0xa << 4)
106 #endif
107 #if defined(CONFIG_MX23)
108 #define	TIMROT_ROTCTRL_SELECT_A_MASK			0x7
109 #elif defined(CONFIG_MX28)
110 #define	TIMROT_ROTCTRL_SELECT_A_MASK			0xf
111 #endif
112 #define	TIMROT_ROTCTRL_SELECT_A_OFFSET			0
113 #define	TIMROT_ROTCTRL_SELECT_A_NEVER_TICK		0x0
114 #define	TIMROT_ROTCTRL_SELECT_A_PWM0			0x1
115 #define	TIMROT_ROTCTRL_SELECT_A_PWM1			0x2
116 #define	TIMROT_ROTCTRL_SELECT_A_PWM2			0x3
117 #define	TIMROT_ROTCTRL_SELECT_A_PWM3			0x4
118 #define	TIMROT_ROTCTRL_SELECT_A_PWM4			0x5
119 #if defined(CONFIG_MX23)
120 #define	TIMROT_ROTCTRL_SELECT_A_ROTARYA		0x6
121 #define	TIMROT_ROTCTRL_SELECT_A_ROTARYB		0x7
122 #elif defined(CONFIG_MX28)
123 #define	TIMROT_ROTCTRL_SELECT_A_PWM5			0x6
124 #define	TIMROT_ROTCTRL_SELECT_A_PWM6			0x7
125 #define	TIMROT_ROTCTRL_SELECT_A_PWM7			0x8
126 #define	TIMROT_ROTCTRL_SELECT_A_ROTARYA			0x9
127 #define	TIMROT_ROTCTRL_SELECT_A_ROTARYB			0xa
128 #endif
129 
130 #define	TIMROT_ROTCOUNT_UPDOWN_MASK			0xffff
131 #define	TIMROT_ROTCOUNT_UPDOWN_OFFSET			0
132 
133 #define	TIMROT_TIMCTRLn_IRQ				(1 << 15)
134 #define	TIMROT_TIMCTRLn_IRQ_EN				(1 << 14)
135 #if defined(CONFIG_MX28)
136 #define	TIMROT_TIMCTRLn_MATCH_MODE			(1 << 11)
137 #endif
138 #define	TIMROT_TIMCTRLn_POLARITY			(1 << 8)
139 #define	TIMROT_TIMCTRLn_UPDATE				(1 << 7)
140 #define	TIMROT_TIMCTRLn_RELOAD				(1 << 6)
141 #define	TIMROT_TIMCTRLn_PRESCALE_MASK			(0x3 << 4)
142 #define	TIMROT_TIMCTRLn_PRESCALE_OFFSET			4
143 #define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_1		(0x0 << 4)
144 #define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_2		(0x1 << 4)
145 #define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_4		(0x2 << 4)
146 #define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_8		(0x3 << 4)
147 #define	TIMROT_TIMCTRLn_SELECT_MASK			0xf
148 #define	TIMROT_TIMCTRLn_SELECT_OFFSET			0
149 #define	TIMROT_TIMCTRLn_SELECT_NEVER_TICK		0x0
150 #define	TIMROT_TIMCTRLn_SELECT_PWM0			0x1
151 #define	TIMROT_TIMCTRLn_SELECT_PWM1			0x2
152 #define	TIMROT_TIMCTRLn_SELECT_PWM2			0x3
153 #define	TIMROT_TIMCTRLn_SELECT_PWM3			0x4
154 #define	TIMROT_TIMCTRLn_SELECT_PWM4			0x5
155 #if defined(CONFIG_MX23)
156 #define	TIMROT_TIMCTRLn_SELECT_ROTARYA		0x6
157 #define	TIMROT_TIMCTRLn_SELECT_ROTARYB		0x7
158 #define	TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL		0x8
159 #define	TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL		0x9
160 #define	TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL		0xa
161 #define	TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL		0xb
162 #define	TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS		0xc
163 #elif defined(CONFIG_MX28)
164 #define	TIMROT_TIMCTRLn_SELECT_PWM5			0x6
165 #define	TIMROT_TIMCTRLn_SELECT_PWM6			0x7
166 #define	TIMROT_TIMCTRLn_SELECT_PWM7			0x8
167 #define	TIMROT_TIMCTRLn_SELECT_ROTARYA			0x9
168 #define	TIMROT_TIMCTRLn_SELECT_ROTARYB			0xa
169 #define	TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL		0xb
170 #define	TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL		0xc
171 #define	TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL		0xd
172 #define	TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL		0xe
173 #define	TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS		0xf
174 #endif
175 
176 #if defined(CONFIG_MX23)
177 #define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK	(0xffff << 16)
178 #define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET	16
179 #elif defined(CONFIG_MX28)
180 #define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK	0xffffffff
181 #define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET	0
182 #endif
183 
184 #if defined(CONFIG_MX23)
185 #define	TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK		0xffff
186 #define	TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET		0
187 #elif defined(CONFIG_MX28)
188 #define	TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK		0xffffffff
189 #define	TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET		0
190 #endif
191 
192 #if defined(CONFIG_MX28)
193 #define	TIMROT_MATCH_COUNTn_MATCH_COUNT_MASK		0xffffffff
194 #define	TIMROT_MATCH_COUNTn_MATCH_COUNT_OFFSET		0
195 #endif
196 
197 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_MASK		(0xf << 16)
198 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_OFFSET		16
199 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_NEVER_TICK		(0x0 << 16)
200 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM0		(0x1 << 16)
201 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM1		(0x2 << 16)
202 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM2		(0x3 << 16)
203 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM3		(0x4 << 16)
204 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM4		(0x5 << 16)
205 #if defined(CONFIG_MX23)
206 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA		(0x6 << 16)
207 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB		(0x7 << 16)
208 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL		(0x8 << 16)
209 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL		(0x9 << 16)
210 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL		(0xa << 16)
211 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL		(0xb << 16)
212 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS		(0xc << 16)
213 #elif defined(CONFIG_MX28)
214 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM5		(0x6 << 16)
215 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM6		(0x7 << 16)
216 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM7		(0x8 << 16)
217 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA		(0x9 << 16)
218 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB		(0xa << 16)
219 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL		(0xb << 16)
220 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL		(0xc << 16)
221 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL		(0xd << 16)
222 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL		(0xe << 16)
223 #define	TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS		(0xf << 16)
224 #endif
225 #if defined(CONFIG_MX23)
226 #define	TIMROT_TIMCTRL3_IRQ				(1 << 15)
227 #define	TIMROT_TIMCTRL3_IRQ_EN				(1 << 14)
228 #define	TIMROT_TIMCTRL3_DUTU_VALID			(1 << 10)
229 #endif
230 #define	TIMROT_TIMCTRL3_DUTY_CYCLE			(1 << 9)
231 #if defined(CONFIG_MX23)
232 #define	TIMROT_TIMCTRL3_POLARITY_MASK			(0x1 << 8)
233 #define	TIMROT_TIMCTRL3_POLARITY_OFFSET		8
234 #define	TIMROT_TIMCTRL3_POLARITY_POSITIVE		(0x0 << 8)
235 #define	TIMROT_TIMCTRL3_POLARITY_NEGATIVE		(0x1 << 8)
236 #define	TIMROT_TIMCTRL3_UPDATE				(1 << 7)
237 #define	TIMROT_TIMCTRL3_RELOAD				(1 << 6)
238 #define	TIMROT_TIMCTRL3_PRESCALE_MASK			(0x3 << 4)
239 #define	TIMROT_TIMCTRL3_PRESCALE_OFFSET		4
240 #define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_1		(0x0 << 4)
241 #define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_2		(0x1 << 4)
242 #define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_4		(0x2 << 4)
243 #define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_8		(0x3 << 4)
244 #define	TIMROT_TIMCTRL3_SELECT_MASK			0xf
245 #define	TIMROT_TIMCTRL3_SELECT_OFFSET			0
246 #define	TIMROT_TIMCTRL3_SELECT_NEVER_TICK		0x0
247 #define	TIMROT_TIMCTRL3_SELECT_PWM0			0x1
248 #define	TIMROT_TIMCTRL3_SELECT_PWM1			0x2
249 #define	TIMROT_TIMCTRL3_SELECT_PWM2			0x3
250 #define	TIMROT_TIMCTRL3_SELECT_PWM3			0x4
251 #define	TIMROT_TIMCTRL3_SELECT_PWM4			0x5
252 #define	TIMROT_TIMCTRL3_SELECT_ROTARYA		0x6
253 #define	TIMROT_TIMCTRL3_SELECT_ROTARYB		0x7
254 #define	TIMROT_TIMCTRL3_SELECT_32KHZ_XTAL		0x8
255 #define	TIMROT_TIMCTRL3_SELECT_8KHZ_XTAL		0x9
256 #define	TIMROT_TIMCTRL3_SELECT_4KHZ_XTAL		0xa
257 #define	TIMROT_TIMCTRL3_SELECT_1KHZ_XTAL		0xb
258 #define	TIMROT_TIMCTRL3_SELECT_TICK_ALWAYS		0xc
259 #define	TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_MASK	(0xffff << 16)
260 #define	TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_OFFSET	16
261 #define	TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_MASK	0xffff
262 #define	TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_OFFSET	0
263 #endif
264 
265 #define	TIMROT_VERSION_MAJOR_MASK			(0xff << 24)
266 #define	TIMROT_VERSION_MAJOR_OFFSET			24
267 #define	TIMROT_VERSION_MINOR_MASK			(0xff << 16)
268 #define	TIMROT_VERSION_MINOR_OFFSET			16
269 #define	TIMROT_VERSION_STEP_MASK			0xffff
270 #define	TIMROT_VERSION_STEP_OFFSET			0
271 
272 #endif /* __MX28_REGS_TIMROT_H__ */
273