1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 */
5
6#include <config.h>
7
8#define ROM_API_TABLE_BASE_ADDR_LEGACY		0x180
9#define ROM_VERSION_OFFSET               	0x80
10#define ROM_API_HWCNFG_SETUP_OFFSET		0x08
11
12plugin_start:
13
14	push    {r0-r4, lr}
15
16	imx7_ddr_setting
17	imx7_clock_gating
18	imx7_qos_setting
19
20/*
21 * Check if we are in USB serial download mode and immediately return to ROM
22 * Need to check USB CTRL clock firstly, then check the USBx_nASYNCLISTADDR
23 */
24	ldr r0, =0x30384680
25	ldr r1, [r0]
26	cmp r1, #0
27	beq normal_boot
28
29	ldr r0, =0x30B10158
30	ldr r1, [r0]
31	cmp r1, #0
32	beq normal_boot
33
34	pop {r0-r4, lr}
35	bx lr
36
37normal_boot:
38
39/*
40 * The following is to fill in those arguments for this ROM function
41 * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
42 * This function is used to copy data from the storage media into DDR.
43 * start - Initial (possibly partial) image load address on entry.
44 *         Final image load address on exit.
45 * bytes - Initial (possibly partial) image size on entry.
46 *         Final image size on exit.
47 * boot_data - Initial @ref ivt Boot Data load address.
48 */
49	adr r0, boot_data2
50	adr r1, image_len2
51	adr r2, boot_data2
52
53/*
54 * check the _pu_irom_api_table for the address
55 */
56before_calling_rom___pu_irom_hwcnfg_setup:
57	ldr r3, =ROM_VERSION_OFFSET
58	ldr r4, [r3]
59	ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
60	ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
61	blx r4
62after_calling_rom___pu_irom_hwcnfg_setup:
63
64
65/* To return to ROM from plugin, we need to fill in these argument.
66 * Here is what need to do:
67 * Need to construct the paramters for this function before return to ROM:
68 * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
69 */
70	pop {r0-r4, lr}
71	push {r5}
72	ldr r5, boot_data2
73	str r5, [r0]
74	ldr r5, image_len2
75	str r5, [r1]
76	ldr r5, second_ivt_offset
77	str r5, [r2]
78	mov r0, #1
79	pop {r5}
80
81	/* return back to ROM code */
82	bx lr
83
84/* make the following data right in the end of the output*/
85.ltorg
86
87#define FLASH_OFFSET 0x400
88
89/*
90 * second_ivt_offset is the offset from the "second_ivt_header" to
91 * "image_copy_start", which involves FLASH_OFFSET, plus the first
92 * ivt_header, the plugin code size itself recorded by "ivt2_header"
93 */
94
95second_ivt_offset:      .long (ivt2_header + 0x2C + FLASH_OFFSET)
96
97/*
98 * The following is the second IVT header plus the second boot data
99 */
100ivt2_header:            .long 0x0
101app2_code_jump_v:       .long 0x0
102reserv3:                .long 0x0
103dcd2_ptr:               .long 0x0
104boot_data2_ptr:         .long 0x0
105self_ptr2:              .long 0x0
106app_code_csf2:          .long 0x0
107reserv4:                .long 0x0
108boot_data2:             .long 0x0
109image_len2:             .long 0x0
110plugin2:                .long 0x0
111