1 /* 2 * This program is free software; you can redistribute it and/or 3 * modify it under the terms of the GNU General Public License 4 * as published by the Free Software Foundation; either version 2 5 * of the License, or (at your option) any later version. 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 14 * MA 02110-1301, USA. 15 */ 16 17 #ifndef __ASM_ARCH_IOMUX_H__ 18 #define __ASM_ARCH_IOMUX_H__ 19 /* 20 * IOMUXC_GPR13 bit fields 21 */ 22 #define IOMUXC_GPR13_SDMA_STOP_REQ (1<<30) 23 #define IOMUXC_GPR13_CAN2_STOP_REQ (1<<29) 24 #define IOMUXC_GPR13_CAN1_STOP_REQ (1<<28) 25 #define IOMUXC_GPR13_ENET_STOP_REQ (1<<27) 26 #define IOMUXC_GPR13_SATA_PHY_8_MASK (7<<24) 27 #define IOMUXC_GPR13_SATA_PHY_7_MASK (0x1f<<19) 28 #define IOMUXC_GPR13_SATA_PHY_6_SHIFT 16 29 #define IOMUXC_GPR13_SATA_PHY_6_MASK (7<<IOMUXC_GPR13_SATA_PHY_6_SHIFT) 30 #define IOMUXC_GPR13_SATA_SPEED_MASK (1<<15) 31 #define IOMUXC_GPR13_SATA_PHY_5_MASK (1<<14) 32 #define IOMUXC_GPR13_SATA_PHY_4_MASK (7<<11) 33 #define IOMUXC_GPR13_SATA_PHY_3_MASK (0x1f<<7) 34 #define IOMUXC_GPR13_SATA_PHY_2_MASK (0x1f<<2) 35 #define IOMUXC_GPR13_SATA_PHY_1_MASK (3<<0) 36 37 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB (0<<24) 38 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB (1<<24) 39 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB (2<<24) 40 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB (3<<24) 41 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB (4<<24) 42 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB (5<<24) 43 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB (6<<24) 44 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB (7<<24) 45 46 #define IOMUXC_GPR13_SATA_PHY_7_SATA1I (0x10<<19) 47 #define IOMUXC_GPR13_SATA_PHY_7_SATA1M (0x10<<19) 48 #define IOMUXC_GPR13_SATA_PHY_7_SATA1X (0x1A<<19) 49 #define IOMUXC_GPR13_SATA_PHY_7_SATA2I (0x12<<19) 50 #define IOMUXC_GPR13_SATA_PHY_7_SATA2M (0x12<<19) 51 #define IOMUXC_GPR13_SATA_PHY_7_SATA2X (0x1A<<19) 52 53 #define IOMUXC_GPR13_SATA_SPEED_1P5G (0<<15) 54 #define IOMUXC_GPR13_SATA_SPEED_3G (1<<15) 55 56 #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED (0<<14) 57 #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED (1<<14) 58 59 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16 (0<<11) 60 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16 (1<<11) 61 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16 (2<<11) 62 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16 (3<<11) 63 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16 (4<<11) 64 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16 (5<<11) 65 66 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB (0<<7) 67 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB (1<<7) 68 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB (2<<7) 69 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB (3<<7) 70 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB (4<<7) 71 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB (5<<7) 72 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB (6<<7) 73 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB (7<<7) 74 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB (8<<7) 75 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB (9<<7) 76 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB (0xA<<7) 77 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB (0xB<<7) 78 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB (0xC<<7) 79 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB (0xD<<7) 80 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB (0xE<<7) 81 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB (0xF<<7) 82 83 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V (0<<2) 84 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V (1<<2) 85 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V (2<<2) 86 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V (3<<2) 87 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V (4<<2) 88 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V (5<<2) 89 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V (6<<2) 90 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V (7<<2) 91 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V (8<<2) 92 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V (9<<2) 93 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V (0xA<<2) 94 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V (0xB<<2) 95 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V (0xC<<2) 96 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V (0xD<<2) 97 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V (0xE<<2) 98 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V (0xF<<2) 99 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V (0x10<<2) 100 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V (0x11<<2) 101 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V (0x12<<2) 102 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V (0x13<<2) 103 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V (0x14<<2) 104 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V (0x15<<2) 105 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V (0x16<<2) 106 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V (0x17<<2) 107 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V (0x18<<2) 108 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V (0x19<<2) 109 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V (0x1A<<2) 110 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V (0x1B<<2) 111 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V (0x1C<<2) 112 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V (0x1D<<2) 113 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V (0x1E<<2) 114 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V (0x1F<<2) 115 116 #define IOMUXC_GPR13_SATA_PHY_1_FAST 0 117 #define IOMUXC_GPR13_SATA_PHY_1_MEDIUM 1 118 #define IOMUXC_GPR13_SATA_PHY_1_SLOW 2 119 120 #define IOMUXC_GPR13_SATA_MASK (IOMUXC_GPR13_SATA_PHY_8_MASK \ 121 |IOMUXC_GPR13_SATA_PHY_7_MASK \ 122 |IOMUXC_GPR13_SATA_PHY_6_MASK \ 123 |IOMUXC_GPR13_SATA_SPEED_MASK \ 124 |IOMUXC_GPR13_SATA_PHY_5_MASK \ 125 |IOMUXC_GPR13_SATA_PHY_4_MASK \ 126 |IOMUXC_GPR13_SATA_PHY_3_MASK \ 127 |IOMUXC_GPR13_SATA_PHY_2_MASK \ 128 |IOMUXC_GPR13_SATA_PHY_1_MASK) 129 #endif /* __ASM_ARCH_IOMUX_H__ */ 130