1*729b74adSStefano Babic /*
2*729b74adSStefano Babic  * Copyright (C) 2011
3*729b74adSStefano Babic  * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
4*729b74adSStefano Babic  *
5*729b74adSStefano Babic  * See file CREDITS for list of people who contributed to this
6*729b74adSStefano Babic  * project.
7*729b74adSStefano Babic  *
8*729b74adSStefano Babic  * This program is free software; you can redistribute it and/or
9*729b74adSStefano Babic  * modify it under the terms of the GNU General Public License as
10*729b74adSStefano Babic  * published by the Free Software Foundation; either version 2 of
11*729b74adSStefano Babic  * the License, or (at your option) any later version.
12*729b74adSStefano Babic  *
13*729b74adSStefano Babic  * This program is distributed in the hope that it will be useful,
14*729b74adSStefano Babic  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*729b74adSStefano Babic  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*729b74adSStefano Babic  * GNU General Public License for more details.
17*729b74adSStefano Babic  *
18*729b74adSStefano Babic  * You should have received a copy of the GNU General Public License
19*729b74adSStefano Babic  * along with this program; if not, write to the Free Software
20*729b74adSStefano Babic  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21*729b74adSStefano Babic  * MA 02111-1307 USA
22*729b74adSStefano Babic  */
23*729b74adSStefano Babic 
24*729b74adSStefano Babic 
25*729b74adSStefano Babic #ifndef __ASM_ARCH_MX35_GPIO_H
26*729b74adSStefano Babic #define __ASM_ARCH_MX35_GPIO_H
27*729b74adSStefano Babic 
28*729b74adSStefano Babic /* GPIO registers */
29*729b74adSStefano Babic struct gpio_regs {
30*729b74adSStefano Babic 	u32 gpio_dr;	/* data */
31*729b74adSStefano Babic 	u32 gpio_dir;	/* direction */
32*729b74adSStefano Babic 	u32 psr;	/* pad satus */
33*729b74adSStefano Babic 	u32 icr1;	/* interrupt config 1 */
34*729b74adSStefano Babic 	u32 icr2;	/* interrupt config 2 */
35*729b74adSStefano Babic 	u32 imr;	/* interrupt mask */
36*729b74adSStefano Babic 	u32 isr;	/* interrupt status */
37*729b74adSStefano Babic 	u32 edge_sel;	/* edge select */
38*729b74adSStefano Babic };
39*729b74adSStefano Babic 
40*729b74adSStefano Babic #endif
41