1 /* 2 * (C) Copyright 2011 3 * Matthias Weisser <weisserm@arcor.de> 4 * 5 * (C) Copyright 2009 DENX Software Engineering 6 * Author: John Rigby <jrigby@gmail.com> 7 * 8 * Common asm macros for imx25 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #ifndef __ASM_ARM_ARCH_MACRO_H__ 30 #define __ASM_ARM_ARCH_MACRO_H__ 31 #ifdef __ASSEMBLY__ 32 33 #include <asm/arch/imx-regs.h> 34 #include <generated/asm-offsets.h> 35 36 .macro init_aips 37 write32 IMX_AIPS1_BASE + AIPS_MPR_0_7, 0x77777777 38 write32 IMX_AIPS1_BASE + AIPS_MPR_8_15, 0x77777777 39 write32 IMX_AIPS2_BASE + AIPS_MPR_0_7, 0x77777777 40 write32 IMX_AIPS2_BASE + AIPS_MPR_8_15, 0x77777777 41 .endm 42 43 .macro init_max 44 write32 IMX_MAX_BASE + MAX_MPR0, 0x43210 45 write32 IMX_MAX_BASE + MAX_MPR1, 0x43210 46 write32 IMX_MAX_BASE + MAX_MPR2, 0x43210 47 write32 IMX_MAX_BASE + MAX_MPR3, 0x43210 48 write32 IMX_MAX_BASE + MAX_MPR4, 0x43210 49 50 write32 IMX_MAX_BASE + MAX_SGPCR0, 0x10 51 write32 IMX_MAX_BASE + MAX_SGPCR1, 0x10 52 write32 IMX_MAX_BASE + MAX_SGPCR2, 0x10 53 write32 IMX_MAX_BASE + MAX_SGPCR3, 0x10 54 write32 IMX_MAX_BASE + MAX_SGPCR4, 0x10 55 56 write32 IMX_MAX_BASE + MAX_MGPCR0, 0x0 57 write32 IMX_MAX_BASE + MAX_MGPCR1, 0x0 58 write32 IMX_MAX_BASE + MAX_MGPCR2, 0x0 59 write32 IMX_MAX_BASE + MAX_MGPCR3, 0x0 60 write32 IMX_MAX_BASE + MAX_MGPCR4, 0x0 61 .endm 62 63 #endif /* __ASSEMBLY__ */ 64 #endif /* __ASM_ARM_ARCH_MACRO_H__ */ 65