1ab3a990bSBenoît Thébaudeau /* 2ab3a990bSBenoît Thébaudeau * (C) Copyright 2013 ADVANSEE 3ab3a990bSBenoît Thébaudeau * Benoît Thébaudeau <benoit.thebaudeau@advansee.com> 4ab3a990bSBenoît Thébaudeau * 5ab3a990bSBenoît Thébaudeau * Based on mainline Linux i.MX iomux-mx25.h file: 6ab3a990bSBenoît Thébaudeau * Copyright (C) 2009 by Lothar Wassmann <LW@KARO-electronics.de> 7ab3a990bSBenoît Thébaudeau * 8ab3a990bSBenoît Thébaudeau * Based on Linux arch/arm/mach-mx25/mx25_pins.h: 9ab3a990bSBenoît Thébaudeau * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 10ab3a990bSBenoît Thébaudeau * and Linux arch/arm/plat-mxc/include/mach/iomux-mx35.h: 11ab3a990bSBenoît Thébaudeau * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> 12ab3a990bSBenoît Thébaudeau * 131a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 14ab3a990bSBenoît Thébaudeau */ 15ab3a990bSBenoît Thébaudeau 16ab3a990bSBenoît Thébaudeau #ifndef __IOMUX_MX25_H__ 17ab3a990bSBenoît Thébaudeau #define __IOMUX_MX25_H__ 18ab3a990bSBenoît Thébaudeau 19*552a848eSStefano Babic #include <asm/mach-imx/iomux-v3.h> 20ab3a990bSBenoît Thébaudeau 21ab3a990bSBenoît Thébaudeau /* Pad control groupings */ 22ab3a990bSBenoît Thébaudeau #define MX25_KPP_ROW_PAD_CTRL PAD_CTL_PUS_100K_UP 23ab3a990bSBenoît Thébaudeau #define MX25_KPP_COL_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) 24ab3a990bSBenoît Thébaudeau 25ab3a990bSBenoît Thébaudeau /* 26ab3a990bSBenoît Thébaudeau * The naming convention for the pad modes is MX25_PAD_<padname>__<padmode> 27ab3a990bSBenoît Thébaudeau * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num> 28ab3a990bSBenoît Thébaudeau * See also iomux-v3.h 29ab3a990bSBenoît Thébaudeau */ 30ab3a990bSBenoît Thébaudeau 31ab3a990bSBenoît Thébaudeau /* PAD MUX ALT INPSE PATH PADCTRL */ 32ab3a990bSBenoît Thébaudeau enum { 33ab3a990bSBenoît Thébaudeau MX25_PAD_A10__A10 = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL), 34ab3a990bSBenoît Thébaudeau MX25_PAD_A10__GPIO_4_0 = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL), 35ab3a990bSBenoît Thébaudeau 36ab3a990bSBenoît Thébaudeau MX25_PAD_A13__A13 = IOMUX_PAD(0x22C, 0x00c, 0x00, 0, 0, NO_PAD_CTRL), 37ab3a990bSBenoît Thébaudeau MX25_PAD_A13__GPIO_4_1 = IOMUX_PAD(0x22C, 0x00c, 0x05, 0, 0, NO_PAD_CTRL), 38ab3a990bSBenoît Thébaudeau 39ab3a990bSBenoît Thébaudeau MX25_PAD_A14__A14 = IOMUX_PAD(0x230, 0x010, 0x10, 0, 0, NO_PAD_CTRL), 40ab3a990bSBenoît Thébaudeau MX25_PAD_A14__GPIO_2_0 = IOMUX_PAD(0x230, 0x010, 0x15, 0, 0, NO_PAD_CTRL), 41ab3a990bSBenoît Thébaudeau 42ab3a990bSBenoît Thébaudeau MX25_PAD_A15__A15 = IOMUX_PAD(0x234, 0x014, 0x10, 0, 0, NO_PAD_CTRL), 43ab3a990bSBenoît Thébaudeau MX25_PAD_A15__GPIO_2_1 = IOMUX_PAD(0x234, 0x014, 0x15, 0, 0, NO_PAD_CTRL), 44ab3a990bSBenoît Thébaudeau 45ab3a990bSBenoît Thébaudeau MX25_PAD_A16__A16 = IOMUX_PAD(0x000, 0x018, 0x10, 0, 0, NO_PAD_CTRL), 46ab3a990bSBenoît Thébaudeau MX25_PAD_A16__GPIO_2_2 = IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL), 47ab3a990bSBenoît Thébaudeau 48ab3a990bSBenoît Thébaudeau MX25_PAD_A17__A17 = IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL), 49ab3a990bSBenoît Thébaudeau MX25_PAD_A17__GPIO_2_3 = IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL), 50ab3a990bSBenoît Thébaudeau 51ab3a990bSBenoît Thébaudeau MX25_PAD_A18__A18 = IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL), 52ab3a990bSBenoît Thébaudeau MX25_PAD_A18__GPIO_2_4 = IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL), 53ab3a990bSBenoît Thébaudeau MX25_PAD_A18__FEC_COL = IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL), 54ab3a990bSBenoît Thébaudeau 55ab3a990bSBenoît Thébaudeau MX25_PAD_A19__A19 = IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL), 56ab3a990bSBenoît Thébaudeau MX25_PAD_A19__FEC_RX_ER = IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL), 57ab3a990bSBenoît Thébaudeau MX25_PAD_A19__GPIO_2_5 = IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL), 58ab3a990bSBenoît Thébaudeau 59ab3a990bSBenoît Thébaudeau MX25_PAD_A20__A20 = IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL), 60ab3a990bSBenoît Thébaudeau MX25_PAD_A20__GPIO_2_6 = IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL), 61ab3a990bSBenoît Thébaudeau MX25_PAD_A20__FEC_RDATA2 = IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL), 62ab3a990bSBenoît Thébaudeau 63ab3a990bSBenoît Thébaudeau MX25_PAD_A21__A21 = IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL), 64ab3a990bSBenoît Thébaudeau MX25_PAD_A21__GPIO_2_7 = IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL), 65ab3a990bSBenoît Thébaudeau MX25_PAD_A21__FEC_RDATA3 = IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL), 66ab3a990bSBenoît Thébaudeau 67ab3a990bSBenoît Thébaudeau MX25_PAD_A22__A22 = IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL), 68ab3a990bSBenoît Thébaudeau MX25_PAD_A22__GPIO_2_8 = IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL), 69ab3a990bSBenoît Thébaudeau 70ab3a990bSBenoît Thébaudeau MX25_PAD_A23__A23 = IOMUX_PAD(0x24c, 0x034, 0x10, 0, 0, NO_PAD_CTRL), 71ab3a990bSBenoît Thébaudeau MX25_PAD_A23__GPIO_2_9 = IOMUX_PAD(0x24c, 0x034, 0x15, 0, 0, NO_PAD_CTRL), 72ab3a990bSBenoît Thébaudeau 73ab3a990bSBenoît Thébaudeau MX25_PAD_A24__A24 = IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL), 74ab3a990bSBenoît Thébaudeau MX25_PAD_A24__GPIO_2_10 = IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL), 75ab3a990bSBenoît Thébaudeau MX25_PAD_A24__FEC_RX_CLK = IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL), 76ab3a990bSBenoît Thébaudeau 77ab3a990bSBenoît Thébaudeau MX25_PAD_A25__A25 = IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL), 78ab3a990bSBenoît Thébaudeau MX25_PAD_A25__GPIO_2_11 = IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL), 79ab3a990bSBenoît Thébaudeau MX25_PAD_A25__FEC_CRS = IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL), 80ab3a990bSBenoît Thébaudeau 81ab3a990bSBenoît Thébaudeau MX25_PAD_EB0__EB0 = IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL), 82ab3a990bSBenoît Thébaudeau MX25_PAD_EB0__AUD4_TXD = IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL), 83ab3a990bSBenoît Thébaudeau MX25_PAD_EB0__GPIO_2_12 = IOMUX_PAD(0x258, 0x040, 0x15, 0, 0, NO_PAD_CTRL), 84ab3a990bSBenoît Thébaudeau 85ab3a990bSBenoît Thébaudeau MX25_PAD_EB1__EB1 = IOMUX_PAD(0x25c, 0x044, 0x10, 0, 0, NO_PAD_CTRL), 86ab3a990bSBenoît Thébaudeau MX25_PAD_EB1__AUD4_RXD = IOMUX_PAD(0x25c, 0x044, 0x14, 0x460, 0, NO_PAD_CTRL), 87ab3a990bSBenoît Thébaudeau MX25_PAD_EB1__GPIO_2_13 = IOMUX_PAD(0x25c, 0x044, 0x15, 0, 0, NO_PAD_CTRL), 88ab3a990bSBenoît Thébaudeau 89ab3a990bSBenoît Thébaudeau MX25_PAD_OE__OE = IOMUX_PAD(0x260, 0x048, 0x10, 0, 0, NO_PAD_CTRL), 90ab3a990bSBenoît Thébaudeau MX25_PAD_OE__AUD4_TXC = IOMUX_PAD(0x260, 0x048, 0x14, 0, 0, NO_PAD_CTRL), 91ab3a990bSBenoît Thébaudeau MX25_PAD_OE__GPIO_2_14 = IOMUX_PAD(0x260, 0x048, 0x15, 0, 0, NO_PAD_CTRL), 92ab3a990bSBenoît Thébaudeau 93ab3a990bSBenoît Thébaudeau MX25_PAD_CS0__CS0 = IOMUX_PAD(0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL), 94ab3a990bSBenoît Thébaudeau MX25_PAD_CS0__GPIO_4_2 = IOMUX_PAD(0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL), 95ab3a990bSBenoît Thébaudeau 96ab3a990bSBenoît Thébaudeau MX25_PAD_CS1__CS1 = IOMUX_PAD(0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL), 97ab3a990bSBenoît Thébaudeau MX25_PAD_CS1__NF_CE3 = IOMUX_PAD(0x000, 0x050, 0x01, 0, 0, NO_PAD_CTRL), 98ab3a990bSBenoît Thébaudeau MX25_PAD_CS1__GPIO_4_3 = IOMUX_PAD(0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL), 99ab3a990bSBenoît Thébaudeau 100ab3a990bSBenoît Thébaudeau MX25_PAD_CS4__CS4 = IOMUX_PAD(0x264, 0x054, 0x10, 0, 0, NO_PAD_CTRL), 101ab3a990bSBenoît Thébaudeau MX25_PAD_CS4__NF_CE1 = IOMUX_PAD(0x264, 0x054, 0x01, 0, 0, NO_PAD_CTRL), 102ab3a990bSBenoît Thébaudeau MX25_PAD_CS4__UART5_CTS = IOMUX_PAD(0x264, 0x054, 0x13, 0, 0, NO_PAD_CTRL), 103ab3a990bSBenoît Thébaudeau MX25_PAD_CS4__GPIO_3_20 = IOMUX_PAD(0x264, 0x054, 0x15, 0, 0, NO_PAD_CTRL), 104ab3a990bSBenoît Thébaudeau 105ab3a990bSBenoît Thébaudeau MX25_PAD_CS5__CS5 = IOMUX_PAD(0x268, 0x058, 0x10, 0, 0, NO_PAD_CTRL), 106ab3a990bSBenoît Thébaudeau MX25_PAD_CS5__NF_CE2 = IOMUX_PAD(0x268, 0x058, 0x01, 0, 0, NO_PAD_CTRL), 107ab3a990bSBenoît Thébaudeau MX25_PAD_CS5__UART5_RTS = IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL), 108ab3a990bSBenoît Thébaudeau MX25_PAD_CS5__GPIO_3_21 = IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL), 109ab3a990bSBenoît Thébaudeau 110ab3a990bSBenoît Thébaudeau MX25_PAD_NF_CE0__NF_CE0 = IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL), 111ab3a990bSBenoît Thébaudeau MX25_PAD_NF_CE0__GPIO_3_22 = IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL), 112ab3a990bSBenoît Thébaudeau 113ab3a990bSBenoît Thébaudeau MX25_PAD_ECB__ECB = IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL), 114ab3a990bSBenoît Thébaudeau MX25_PAD_ECB__UART5_TXD_MUX = IOMUX_PAD(0x270, 0x060, 0x13, 0, 0, NO_PAD_CTRL), 115ab3a990bSBenoît Thébaudeau MX25_PAD_ECB__GPIO_3_23 = IOMUX_PAD(0x270, 0x060, 0x15, 0, 0, NO_PAD_CTRL), 116ab3a990bSBenoît Thébaudeau 117ab3a990bSBenoît Thébaudeau MX25_PAD_LBA__LBA = IOMUX_PAD(0x274, 0x064, 0x10, 0, 0, NO_PAD_CTRL), 118ab3a990bSBenoît Thébaudeau MX25_PAD_LBA__UART5_RXD_MUX = IOMUX_PAD(0x274, 0x064, 0x13, 0x578, 0, NO_PAD_CTRL), 119ab3a990bSBenoît Thébaudeau MX25_PAD_LBA__GPIO_3_24 = IOMUX_PAD(0x274, 0x064, 0x15, 0, 0, NO_PAD_CTRL), 120ab3a990bSBenoît Thébaudeau 121ab3a990bSBenoît Thébaudeau MX25_PAD_BCLK__BCLK = IOMUX_PAD(0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL), 122ab3a990bSBenoît Thébaudeau MX25_PAD_BCLK__GPIO_4_4 = IOMUX_PAD(0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL), 123ab3a990bSBenoît Thébaudeau 124ab3a990bSBenoît Thébaudeau MX25_PAD_RW__RW = IOMUX_PAD(0x278, 0x06c, 0x10, 0, 0, NO_PAD_CTRL), 125ab3a990bSBenoît Thébaudeau MX25_PAD_RW__AUD4_TXFS = IOMUX_PAD(0x278, 0x06c, 0x14, 0x474, 0, NO_PAD_CTRL), 126ab3a990bSBenoît Thébaudeau MX25_PAD_RW__GPIO_3_25 = IOMUX_PAD(0x278, 0x06c, 0x15, 0, 0, NO_PAD_CTRL), 127ab3a990bSBenoît Thébaudeau 128ab3a990bSBenoît Thébaudeau MX25_PAD_NFWE_B__NFWE_B = IOMUX_PAD(0x000, 0x070, 0x10, 0, 0, NO_PAD_CTRL), 129ab3a990bSBenoît Thébaudeau MX25_PAD_NFWE_B__GPIO_3_26 = IOMUX_PAD(0x000, 0x070, 0x15, 0, 0, NO_PAD_CTRL), 130ab3a990bSBenoît Thébaudeau 131ab3a990bSBenoît Thébaudeau MX25_PAD_NFRE_B__NFRE_B = IOMUX_PAD(0x000, 0x074, 0x10, 0, 0, NO_PAD_CTRL), 132ab3a990bSBenoît Thébaudeau MX25_PAD_NFRE_B__GPIO_3_27 = IOMUX_PAD(0x000, 0x074, 0x15, 0, 0, NO_PAD_CTRL), 133ab3a990bSBenoît Thébaudeau 134ab3a990bSBenoît Thébaudeau MX25_PAD_NFALE__NFALE = IOMUX_PAD(0x000, 0x078, 0x10, 0, 0, NO_PAD_CTRL), 135ab3a990bSBenoît Thébaudeau MX25_PAD_NFALE__GPIO_3_28 = IOMUX_PAD(0x000, 0x078, 0x15, 0, 0, NO_PAD_CTRL), 136ab3a990bSBenoît Thébaudeau 137ab3a990bSBenoît Thébaudeau MX25_PAD_NFCLE__NFCLE = IOMUX_PAD(0x000, 0x07c, 0x10, 0, 0, NO_PAD_CTRL), 138ab3a990bSBenoît Thébaudeau MX25_PAD_NFCLE__GPIO_3_29 = IOMUX_PAD(0x000, 0x07c, 0x15, 0, 0, NO_PAD_CTRL), 139ab3a990bSBenoît Thébaudeau 140ab3a990bSBenoît Thébaudeau MX25_PAD_NFWP_B__NFWP_B = IOMUX_PAD(0x000, 0x080, 0x10, 0, 0, NO_PAD_CTRL), 141ab3a990bSBenoît Thébaudeau MX25_PAD_NFWP_B__GPIO_3_30 = IOMUX_PAD(0x000, 0x080, 0x15, 0, 0, NO_PAD_CTRL), 142ab3a990bSBenoît Thébaudeau 143ab3a990bSBenoît Thébaudeau MX25_PAD_NFRB__NFRB = IOMUX_PAD(0x27c, 0x084, 0x10, 0, 0, PAD_CTL_PKE), 144ab3a990bSBenoît Thébaudeau MX25_PAD_NFRB__GPIO_3_31 = IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL), 145ab3a990bSBenoît Thébaudeau 146ab3a990bSBenoît Thébaudeau MX25_PAD_D15__D15 = IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL), 147ab3a990bSBenoît Thébaudeau MX25_PAD_D15__LD16 = IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST), 148ab3a990bSBenoît Thébaudeau MX25_PAD_D15__GPIO_4_5 = IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL), 149ab3a990bSBenoît Thébaudeau 150ab3a990bSBenoît Thébaudeau MX25_PAD_D14__D14 = IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL), 151ab3a990bSBenoît Thébaudeau MX25_PAD_D14__LD17 = IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST), 152ab3a990bSBenoît Thébaudeau MX25_PAD_D14__GPIO_4_6 = IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL), 153ab3a990bSBenoît Thébaudeau 154ab3a990bSBenoît Thébaudeau MX25_PAD_D13__D13 = IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL), 155ab3a990bSBenoît Thébaudeau MX25_PAD_D13__LD18 = IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST), 156ab3a990bSBenoît Thébaudeau MX25_PAD_D13__GPIO_4_7 = IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL), 157ab3a990bSBenoît Thébaudeau 158ab3a990bSBenoît Thébaudeau MX25_PAD_D12__D12 = IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL), 159ab3a990bSBenoît Thébaudeau MX25_PAD_D12__GPIO_4_8 = IOMUX_PAD(0x28c, 0x094, 0x05, 0, 0, NO_PAD_CTRL), 160ab3a990bSBenoît Thébaudeau 161ab3a990bSBenoît Thébaudeau MX25_PAD_D11__D11 = IOMUX_PAD(0x290, 0x098, 0x00, 0, 0, NO_PAD_CTRL), 162ab3a990bSBenoît Thébaudeau MX25_PAD_D11__GPIO_4_9 = IOMUX_PAD(0x290, 0x098, 0x05, 0, 0, NO_PAD_CTRL), 163ab3a990bSBenoît Thébaudeau 164ab3a990bSBenoît Thébaudeau MX25_PAD_D10__D10 = IOMUX_PAD(0x294, 0x09c, 0x00, 0, 0, NO_PAD_CTRL), 165ab3a990bSBenoît Thébaudeau MX25_PAD_D10__GPIO_4_10 = IOMUX_PAD(0x294, 0x09c, 0x05, 0, 0, NO_PAD_CTRL), 166ab3a990bSBenoît Thébaudeau MX25_PAD_D10__USBOTG_OC = IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP), 167ab3a990bSBenoît Thébaudeau 168ab3a990bSBenoît Thébaudeau MX25_PAD_D9__D9 = IOMUX_PAD(0x298, 0x0a0, 0x00, 0, 0, NO_PAD_CTRL), 169ab3a990bSBenoît Thébaudeau MX25_PAD_D9__GPIO_4_11 = IOMUX_PAD(0x298, 0x0a0, 0x05, 0, 0, NO_PAD_CTRL), 170ab3a990bSBenoît Thébaudeau MX25_PAD_D9__USBH2_PWR = IOMUX_PAD(0x298, 0x0a0, 0x06, 0, 0, PAD_CTL_PKE), 171ab3a990bSBenoît Thébaudeau 172ab3a990bSBenoît Thébaudeau MX25_PAD_D8__D8 = IOMUX_PAD(0x29c, 0x0a4, 0x00, 0, 0, NO_PAD_CTRL), 173ab3a990bSBenoît Thébaudeau MX25_PAD_D8__GPIO_4_12 = IOMUX_PAD(0x29c, 0x0a4, 0x05, 0, 0, NO_PAD_CTRL), 174ab3a990bSBenoît Thébaudeau MX25_PAD_D8__USBH2_OC = IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP), 175ab3a990bSBenoît Thébaudeau 176ab3a990bSBenoît Thébaudeau MX25_PAD_D7__D7 = IOMUX_PAD(0x2a0, 0x0a8, 0x00, 0, 0, NO_PAD_CTRL), 177ab3a990bSBenoît Thébaudeau MX25_PAD_D7__GPIO_4_13 = IOMUX_PAD(0x2a0, 0x0a8, 0x05, 0, 0, NO_PAD_CTRL), 178ab3a990bSBenoît Thébaudeau 179ab3a990bSBenoît Thébaudeau MX25_PAD_D6__D6 = IOMUX_PAD(0x2a4, 0x0ac, 0x00, 0, 0, NO_PAD_CTRL), 180ab3a990bSBenoît Thébaudeau MX25_PAD_D6__GPIO_4_14 = IOMUX_PAD(0x2a4, 0x0ac, 0x05, 0, 0, NO_PAD_CTRL), 181ab3a990bSBenoît Thébaudeau 182ab3a990bSBenoît Thébaudeau MX25_PAD_D5__D5 = IOMUX_PAD(0x2a8, 0x0b0, 0x00, 0, 0, NO_PAD_CTRL), 183ab3a990bSBenoît Thébaudeau MX25_PAD_D5__GPIO_4_15 = IOMUX_PAD(0x2a8, 0x0b0, 0x05, 0, 0, NO_PAD_CTRL), 184ab3a990bSBenoît Thébaudeau 185ab3a990bSBenoît Thébaudeau MX25_PAD_D4__D4 = IOMUX_PAD(0x2ac, 0x0b4, 0x00, 0, 0, NO_PAD_CTRL), 186ab3a990bSBenoît Thébaudeau MX25_PAD_D4__GPIO_4_16 = IOMUX_PAD(0x2ac, 0x0b4, 0x05, 0, 0, NO_PAD_CTRL), 187ab3a990bSBenoît Thébaudeau 188ab3a990bSBenoît Thébaudeau MX25_PAD_D3__D3 = IOMUX_PAD(0x2b0, 0x0b8, 0x00, 0, 0, NO_PAD_CTRL), 189ab3a990bSBenoît Thébaudeau MX25_PAD_D3__GPIO_4_17 = IOMUX_PAD(0x2b0, 0x0b8, 0x05, 0, 0, NO_PAD_CTRL), 190ab3a990bSBenoît Thébaudeau 191ab3a990bSBenoît Thébaudeau MX25_PAD_D2__D2 = IOMUX_PAD(0x2b4, 0x0bc, 0x00, 0, 0, NO_PAD_CTRL), 192ab3a990bSBenoît Thébaudeau MX25_PAD_D2__GPIO_4_18 = IOMUX_PAD(0x2b4, 0x0bc, 0x05, 0, 0, NO_PAD_CTRL), 193ab3a990bSBenoît Thébaudeau 194ab3a990bSBenoît Thébaudeau MX25_PAD_D1__D1 = IOMUX_PAD(0x2b8, 0x0c0, 0x00, 0, 0, NO_PAD_CTRL), 195ab3a990bSBenoît Thébaudeau MX25_PAD_D1__GPIO_4_19 = IOMUX_PAD(0x2b8, 0x0c0, 0x05, 0, 0, NO_PAD_CTRL), 196ab3a990bSBenoît Thébaudeau 197ab3a990bSBenoît Thébaudeau MX25_PAD_D0__D0 = IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL), 198ab3a990bSBenoît Thébaudeau MX25_PAD_D0__GPIO_4_20 = IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL), 199ab3a990bSBenoît Thébaudeau 200ab3a990bSBenoît Thébaudeau MX25_PAD_LD0__LD0 = IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST), 201ab3a990bSBenoît Thébaudeau MX25_PAD_LD0__CSI_D0 = IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL), 202ab3a990bSBenoît Thébaudeau MX25_PAD_LD0__GPIO_2_15 = IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL), 203ab3a990bSBenoît Thébaudeau 204ab3a990bSBenoît Thébaudeau MX25_PAD_LD1__LD1 = IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST), 205ab3a990bSBenoît Thébaudeau MX25_PAD_LD1__CSI_D1 = IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL), 206ab3a990bSBenoît Thébaudeau MX25_PAD_LD1__GPIO_2_16 = IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL), 207ab3a990bSBenoît Thébaudeau 208ab3a990bSBenoît Thébaudeau MX25_PAD_LD2__LD2 = IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST), 209ab3a990bSBenoît Thébaudeau MX25_PAD_LD2__GPIO_2_17 = IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL), 210ab3a990bSBenoît Thébaudeau 211ab3a990bSBenoît Thébaudeau MX25_PAD_LD3__LD3 = IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST), 212ab3a990bSBenoît Thébaudeau MX25_PAD_LD3__GPIO_2_18 = IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL), 213ab3a990bSBenoît Thébaudeau 214ab3a990bSBenoît Thébaudeau MX25_PAD_LD4__LD4 = IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST), 215ab3a990bSBenoît Thébaudeau MX25_PAD_LD4__GPIO_2_19 = IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL), 216ab3a990bSBenoît Thébaudeau 217ab3a990bSBenoît Thébaudeau MX25_PAD_LD5__LD5 = IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST), 218ab3a990bSBenoît Thébaudeau MX25_PAD_LD5__GPIO_1_19 = IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL), 219ab3a990bSBenoît Thébaudeau 220ab3a990bSBenoît Thébaudeau MX25_PAD_LD6__LD6 = IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST), 221ab3a990bSBenoît Thébaudeau MX25_PAD_LD6__GPIO_1_20 = IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL), 222ab3a990bSBenoît Thébaudeau 223ab3a990bSBenoît Thébaudeau MX25_PAD_LD7__LD7 = IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST), 224ab3a990bSBenoît Thébaudeau MX25_PAD_LD7__GPIO_1_21 = IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL), 225ab3a990bSBenoît Thébaudeau 226ab3a990bSBenoît Thébaudeau MX25_PAD_LD8__LD8 = IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST), 227ab3a990bSBenoît Thébaudeau MX25_PAD_LD8__FEC_TX_ERR = IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL), 228ab3a990bSBenoît Thébaudeau 229ab3a990bSBenoît Thébaudeau MX25_PAD_LD9__LD9 = IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST), 230ab3a990bSBenoît Thébaudeau MX25_PAD_LD9__FEC_COL = IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL), 231ab3a990bSBenoît Thébaudeau 232ab3a990bSBenoît Thébaudeau MX25_PAD_LD10__LD10 = IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST), 233ab3a990bSBenoît Thébaudeau MX25_PAD_LD10__FEC_RX_ER = IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL), 234ab3a990bSBenoît Thébaudeau 235ab3a990bSBenoît Thébaudeau MX25_PAD_LD11__LD11 = IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST), 236ab3a990bSBenoît Thébaudeau MX25_PAD_LD11__FEC_RDATA2 = IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL), 237ab3a990bSBenoît Thébaudeau 238ab3a990bSBenoît Thébaudeau MX25_PAD_LD12__LD12 = IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST), 239ab3a990bSBenoît Thébaudeau MX25_PAD_LD12__FEC_RDATA3 = IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL), 240ab3a990bSBenoît Thébaudeau 241ab3a990bSBenoît Thébaudeau MX25_PAD_LD13__LD13 = IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST), 242ab3a990bSBenoît Thébaudeau MX25_PAD_LD13__FEC_TDATA2 = IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL), 243ab3a990bSBenoît Thébaudeau 244ab3a990bSBenoît Thébaudeau MX25_PAD_LD14__LD14 = IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST), 245ab3a990bSBenoît Thébaudeau MX25_PAD_LD14__FEC_TDATA3 = IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL), 246ab3a990bSBenoît Thébaudeau 247ab3a990bSBenoît Thébaudeau MX25_PAD_LD15__LD15 = IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST), 248ab3a990bSBenoît Thébaudeau MX25_PAD_LD15__FEC_RX_CLK = IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL), 249ab3a990bSBenoît Thébaudeau 250ab3a990bSBenoît Thébaudeau MX25_PAD_HSYNC__HSYNC = IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL), 251ab3a990bSBenoît Thébaudeau MX25_PAD_HSYNC__GPIO_1_22 = IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL), 252ab3a990bSBenoît Thébaudeau 253ab3a990bSBenoît Thébaudeau MX25_PAD_VSYNC__VSYNC = IOMUX_PAD(0x304, 0x10c, 0x10, 0, 0, NO_PAD_CTRL), 254ab3a990bSBenoît Thébaudeau MX25_PAD_VSYNC__GPIO_1_23 = IOMUX_PAD(0x304, 0x10c, 0x15, 0, 0, NO_PAD_CTRL), 255ab3a990bSBenoît Thébaudeau 256ab3a990bSBenoît Thébaudeau MX25_PAD_LSCLK__LSCLK = IOMUX_PAD(0x308, 0x110, 0x10, 0, 0, NO_PAD_CTRL), 257ab3a990bSBenoît Thébaudeau MX25_PAD_LSCLK__GPIO_1_24 = IOMUX_PAD(0x308, 0x110, 0x15, 0, 0, NO_PAD_CTRL), 258ab3a990bSBenoît Thébaudeau 259ab3a990bSBenoît Thébaudeau MX25_PAD_OE_ACD__OE_ACD = IOMUX_PAD(0x30c, 0x114, 0x10, 0, 0, NO_PAD_CTRL), 260ab3a990bSBenoît Thébaudeau MX25_PAD_OE_ACD__GPIO_1_25 = IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL), 261ab3a990bSBenoît Thébaudeau 262ab3a990bSBenoît Thébaudeau MX25_PAD_CONTRAST__CONTRAST = IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL), 263ab3a990bSBenoît Thébaudeau MX25_PAD_CONTRAST__PWM4_PWMO = IOMUX_PAD(0x310, 0x118, 0x14, 0, 0, NO_PAD_CTRL), 264ab3a990bSBenoît Thébaudeau MX25_PAD_CONTRAST__FEC_CRS = IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL), 265ab3a990bSBenoît Thébaudeau 266ab3a990bSBenoît Thébaudeau MX25_PAD_PWM__PWM = IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL), 267ab3a990bSBenoît Thébaudeau MX25_PAD_PWM__GPIO_1_26 = IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL), 268ab3a990bSBenoît Thébaudeau MX25_PAD_PWM__USBH2_OC = IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP), 269ab3a990bSBenoît Thébaudeau 270ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D2__CSI_D2 = IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL), 271ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D2__UART5_RXD_MUX = IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL), 272ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D2__GPIO_1_27 = IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL), 273ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D2__CSPI3_MOSI = IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL), 274ab3a990bSBenoît Thébaudeau 275ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D3__CSI_D3 = IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL), 276ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D3__GPIO_1_28 = IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL), 277ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D3__CSPI3_MISO = IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL), 278ab3a990bSBenoît Thébaudeau 279ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D4__CSI_D4 = IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL), 280ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D4__UART5_RTS = IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL), 281ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D4__GPIO_1_29 = IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL), 282ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D4__CSPI3_SCLK = IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL), 283ab3a990bSBenoît Thébaudeau 284ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D5__CSI_D5 = IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL), 285ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D5__GPIO_1_30 = IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL), 286ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D5__CSPI3_RDY = IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL), 287ab3a990bSBenoît Thébaudeau 288ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D6__CSI_D6 = IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL), 289ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D6__GPIO_1_31 = IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL), 290ab3a990bSBenoît Thébaudeau 291ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D7__CSI_D7 = IOMUX_PAD(0x32c, 0x134, 0x10, 0, 0, NO_PAD_CTRL), 292ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D7__GPIO_1_6 = IOMUX_PAD(0x32c, 0x134, 0x15, 0, 0, NO_PAD_CTRL), 293ab3a990bSBenoît Thébaudeau 294ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D8__CSI_D8 = IOMUX_PAD(0x330, 0x138, 0x10, 0, 0, NO_PAD_CTRL), 295ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D8__GPIO_1_7 = IOMUX_PAD(0x330, 0x138, 0x15, 0, 0, NO_PAD_CTRL), 296ab3a990bSBenoît Thébaudeau 297ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D9__CSI_D9 = IOMUX_PAD(0x334, 0x13c, 0x10, 0, 0, NO_PAD_CTRL), 298ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_D9__GPIO_4_21 = IOMUX_PAD(0x334, 0x13c, 0x15, 0, 0, NO_PAD_CTRL), 299ab3a990bSBenoît Thébaudeau 300ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_MCLK__CSI_MCLK = IOMUX_PAD(0x338, 0x140, 0x10, 0, 0, NO_PAD_CTRL), 301ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_MCLK__GPIO_1_8 = IOMUX_PAD(0x338, 0x140, 0x15, 0, 0, NO_PAD_CTRL), 302ab3a990bSBenoît Thébaudeau 303ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_VSYNC__CSI_VSYNC = IOMUX_PAD(0x33c, 0x144, 0x10, 0, 0, NO_PAD_CTRL), 304ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_VSYNC__GPIO_1_9 = IOMUX_PAD(0x33c, 0x144, 0x15, 0, 0, NO_PAD_CTRL), 305ab3a990bSBenoît Thébaudeau 306ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_HSYNC__CSI_HSYNC = IOMUX_PAD(0x340, 0x148, 0x10, 0, 0, NO_PAD_CTRL), 307ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_HSYNC__GPIO_1_10 = IOMUX_PAD(0x340, 0x148, 0x15, 0, 0, NO_PAD_CTRL), 308ab3a990bSBenoît Thébaudeau 309ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_PIXCLK__CSI_PIXCLK = IOMUX_PAD(0x344, 0x14c, 0x10, 0, 0, NO_PAD_CTRL), 310ab3a990bSBenoît Thébaudeau MX25_PAD_CSI_PIXCLK__GPIO_1_11 = IOMUX_PAD(0x344, 0x14c, 0x15, 0, 0, NO_PAD_CTRL), 311ab3a990bSBenoît Thébaudeau 312ab3a990bSBenoît Thébaudeau MX25_PAD_I2C1_CLK__I2C1_CLK = IOMUX_PAD(0x348, 0x150, 0x10, 0, 0, NO_PAD_CTRL), 313ab3a990bSBenoît Thébaudeau MX25_PAD_I2C1_CLK__GPIO_1_12 = IOMUX_PAD(0x348, 0x150, 0x15, 0, 0, NO_PAD_CTRL), 314ab3a990bSBenoît Thébaudeau 315ab3a990bSBenoît Thébaudeau MX25_PAD_I2C1_DAT__I2C1_DAT = IOMUX_PAD(0x34c, 0x154, 0x10, 0, 0, NO_PAD_CTRL), 316ab3a990bSBenoît Thébaudeau MX25_PAD_I2C1_DAT__GPIO_1_13 = IOMUX_PAD(0x34c, 0x154, 0x15, 0, 0, NO_PAD_CTRL), 317ab3a990bSBenoît Thébaudeau 318ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_MOSI__CSPI1_MOSI = IOMUX_PAD(0x350, 0x158, 0x10, 0, 0, NO_PAD_CTRL), 319ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_MOSI__GPIO_1_14 = IOMUX_PAD(0x350, 0x158, 0x15, 0, 0, NO_PAD_CTRL), 320ab3a990bSBenoît Thébaudeau 321ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_MISO__CSPI1_MISO = IOMUX_PAD(0x354, 0x15c, 0x10, 0, 0, NO_PAD_CTRL), 322ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_MISO__GPIO_1_15 = IOMUX_PAD(0x354, 0x15c, 0x15, 0, 0, NO_PAD_CTRL), 323ab3a990bSBenoît Thébaudeau 324ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SS0__CSPI1_SS0 = IOMUX_PAD(0x358, 0x160, 0x10, 0, 0, NO_PAD_CTRL), 325ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SS0__GPIO_1_16 = IOMUX_PAD(0x358, 0x160, 0x15, 0, 0, NO_PAD_CTRL), 326ab3a990bSBenoît Thébaudeau 327ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SS1__CSPI1_SS1 = IOMUX_PAD(0x35c, 0x164, 0x10, 0, 0, NO_PAD_CTRL), 328ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SS1__I2C3_DAT = IOMUX_PAD(0x35c, 0x164, 0x11, 0x528, 1, NO_PAD_CTRL), 329ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SS1__GPIO_1_17 = IOMUX_PAD(0x35c, 0x164, 0x15, 0, 0, NO_PAD_CTRL), 330ab3a990bSBenoît Thébaudeau 331ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SCLK__CSPI1_SCLK = IOMUX_PAD(0x360, 0x168, 0x10, 0, 0, NO_PAD_CTRL), 332ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_SCLK__GPIO_1_18 = IOMUX_PAD(0x360, 0x168, 0x15, 0, 0, NO_PAD_CTRL), 333ab3a990bSBenoît Thébaudeau 334ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_RDY__CSPI1_RDY = IOMUX_PAD(0x364, 0x16c, 0x10, 0, 0, PAD_CTL_PKE), 335ab3a990bSBenoît Thébaudeau MX25_PAD_CSPI1_RDY__GPIO_2_22 = IOMUX_PAD(0x364, 0x16c, 0x15, 0, 0, NO_PAD_CTRL), 336ab3a990bSBenoît Thébaudeau 337ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_RXD__UART1_RXD = IOMUX_PAD(0x368, 0x170, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN), 338ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_RXD__GPIO_4_22 = IOMUX_PAD(0x368, 0x170, 0x15, 0, 0, NO_PAD_CTRL), 339ab3a990bSBenoît Thébaudeau 340ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_TXD__UART1_TXD = IOMUX_PAD(0x36c, 0x174, 0x10, 0, 0, NO_PAD_CTRL), 341ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_TXD__GPIO_4_23 = IOMUX_PAD(0x36c, 0x174, 0x15, 0, 0, NO_PAD_CTRL), 342ab3a990bSBenoît Thébaudeau 343ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_RTS__UART1_RTS = IOMUX_PAD(0x370, 0x178, 0x10, 0, 0, PAD_CTL_PUS_100K_UP), 344ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_RTS__CSI_D0 = IOMUX_PAD(0x370, 0x178, 0x11, 0x488, 1, NO_PAD_CTRL), 345ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_RTS__GPIO_4_24 = IOMUX_PAD(0x370, 0x178, 0x15, 0, 0, NO_PAD_CTRL), 346ab3a990bSBenoît Thébaudeau 347ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_CTS__UART1_CTS = IOMUX_PAD(0x374, 0x17c, 0x10, 0, 0, PAD_CTL_PUS_100K_UP), 348ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_CTS__CSI_D1 = IOMUX_PAD(0x374, 0x17c, 0x11, 0x48c, 1, NO_PAD_CTRL), 349ab3a990bSBenoît Thébaudeau MX25_PAD_UART1_CTS__GPIO_4_25 = IOMUX_PAD(0x374, 0x17c, 0x15, 0, 0, NO_PAD_CTRL), 350ab3a990bSBenoît Thébaudeau 351ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_RXD__UART2_RXD = IOMUX_PAD(0x378, 0x180, 0x10, 0, 0, NO_PAD_CTRL), 352ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_RXD__GPIO_4_26 = IOMUX_PAD(0x378, 0x180, 0x15, 0, 0, NO_PAD_CTRL), 353ab3a990bSBenoît Thébaudeau 354ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_TXD__UART2_TXD = IOMUX_PAD(0x37c, 0x184, 0x10, 0, 0, NO_PAD_CTRL), 355ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_TXD__GPIO_4_27 = IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL), 356ab3a990bSBenoît Thébaudeau 357ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_RTS__UART2_RTS = IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL), 358ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_RTS__FEC_COL = IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL), 359ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_RTS__GPIO_4_28 = IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL), 360ab3a990bSBenoît Thébaudeau 361ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_CTS__FEC_RX_ER = IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL), 362ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_CTS__UART2_CTS = IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL), 363ab3a990bSBenoît Thébaudeau MX25_PAD_UART2_CTS__GPIO_4_29 = IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL), 364ab3a990bSBenoît Thébaudeau 365ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CMD__SD1_CMD = IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 366ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CMD__FEC_RDATA2 = IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL), 367ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CMD__GPIO_2_23 = IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL), 368ab3a990bSBenoît Thébaudeau 369ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CLK__SD1_CLK = IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 370ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CLK__FEC_RDATA3 = IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL), 371ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_CLK__GPIO_2_24 = IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL), 372ab3a990bSBenoît Thébaudeau 373ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 374ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA0__GPIO_2_25 = IOMUX_PAD(0x390, 0x198, 0x15, 0, 0, NO_PAD_CTRL), 375ab3a990bSBenoît Thébaudeau 376ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x394, 0x19c, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 377ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA1__AUD7_RXD = IOMUX_PAD(0x394, 0x19c, 0x13, 0x478, 0, NO_PAD_CTRL), 378ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA1__GPIO_2_26 = IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL), 379ab3a990bSBenoît Thébaudeau 380ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 381ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA2__FEC_RX_CLK = IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL), 382ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA2__GPIO_2_27 = IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL), 383ab3a990bSBenoît Thébaudeau 384ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP), 385ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA3__FEC_CRS = IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL), 386ab3a990bSBenoît Thébaudeau MX25_PAD_SD1_DATA3__GPIO_2_28 = IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL), 387ab3a990bSBenoît Thébaudeau 388ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW0__KPP_ROW0 = IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL), 389ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW0__GPIO_2_29 = IOMUX_PAD(0x3a0, 0x1a8, 0x15, 0, 0, NO_PAD_CTRL), 390ab3a990bSBenoît Thébaudeau 391ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW1__KPP_ROW1 = IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL), 392ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW1__GPIO_2_30 = IOMUX_PAD(0x3a4, 0x1ac, 0x15, 0, 0, NO_PAD_CTRL), 393ab3a990bSBenoît Thébaudeau 394ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW2__KPP_ROW2 = IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL), 395ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW2__CSI_D0 = IOMUX_PAD(0x3a8, 0x1b0, 0x13, 0x488, 2, NO_PAD_CTRL), 396ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW2__GPIO_2_31 = IOMUX_PAD(0x3a8, 0x1b0, 0x15, 0, 0, NO_PAD_CTRL), 397ab3a990bSBenoît Thébaudeau 398ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW3__KPP_ROW3 = IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL), 399ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW3__CSI_LD1 = IOMUX_PAD(0x3ac, 0x1b4, 0x13, 0x48c, 2, NO_PAD_CTRL), 400ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_ROW3__GPIO_3_0 = IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL), 401ab3a990bSBenoît Thébaudeau 402ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL0__KPP_COL0 = IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL), 403ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL0__UART4_RXD_MUX = IOMUX_PAD(0x3b0, 0x1b8, 0x11, 0x570, 1, NO_PAD_CTRL), 404ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL0__AUD5_TXD = IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PUS_100K_UP), 405ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL0__GPIO_3_1 = IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL), 406ab3a990bSBenoît Thébaudeau 407ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL1__KPP_COL1 = IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL), 408ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL1__UART4_TXD_MUX = IOMUX_PAD(0x3b4, 0x1bc, 0x11, 0, 0, NO_PAD_CTRL), 409ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL1__AUD5_RXD = IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PUS_100K_UP), 410ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL1__GPIO_3_2 = IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL), 411ab3a990bSBenoît Thébaudeau 412ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL2__KPP_COL2 = IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL), 413ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL2__UART4_RTS = IOMUX_PAD(0x3b8, 0x1c0, 0x11, 0, 0, NO_PAD_CTRL), 414ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL2__AUD5_TXC = IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PUS_100K_UP), 415ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL2__GPIO_3_3 = IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL), 416ab3a990bSBenoît Thébaudeau 417ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL3__KPP_COL3 = IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL), 418ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL3__UART4_CTS = IOMUX_PAD(0x3bc, 0x1c4, 0x11, 0, 0, NO_PAD_CTRL), 419ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL3__AUD5_TXFS = IOMUX_PAD(0x3bc, 0x1c4, 0x12, 0, 0, PAD_CTL_PUS_100K_UP), 420ab3a990bSBenoît Thébaudeau MX25_PAD_KPP_COL3__GPIO_3_4 = IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL), 421ab3a990bSBenoît Thébaudeau 422ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDC__FEC_MDC = IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL), 423ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDC__AUD4_TXD = IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL), 424ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDC__GPIO_3_5 = IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL), 425ab3a990bSBenoît Thébaudeau 426ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDIO__FEC_MDIO = IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP), 427ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDIO__AUD4_RXD = IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL), 428ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_MDIO__GPIO_3_6 = IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL), 429ab3a990bSBenoît Thébaudeau 430ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TDATA0__FEC_TDATA0 = IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL), 431ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TDATA0__GPIO_3_7 = IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL), 432ab3a990bSBenoît Thébaudeau 433ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TDATA1__FEC_TDATA1 = IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL), 434ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TDATA1__AUD4_TXFS = IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL), 435ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TDATA1__GPIO_3_8 = IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL), 436ab3a990bSBenoît Thébaudeau 437ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TX_EN__FEC_TX_EN = IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL), 438ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TX_EN__GPIO_3_9 = IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL), 439ab3a990bSBenoît Thébaudeau 440ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RDATA0__FEC_RDATA0 = IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN), 441ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RDATA0__GPIO_3_10 = IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL), 442ab3a990bSBenoît Thébaudeau 443ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RDATA1__FEC_RDATA1 = IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN), 444ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RDATA1__GPIO_3_11 = IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL), 445ab3a990bSBenoît Thébaudeau 446ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RX_DV__FEC_RX_DV = IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN), 447ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RX_DV__CAN2_RX = IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP), 448ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_RX_DV__GPIO_3_12 = IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL), 449ab3a990bSBenoît Thébaudeau 450ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TX_CLK__FEC_TX_CLK = IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN), 451ab3a990bSBenoît Thébaudeau MX25_PAD_FEC_TX_CLK__GPIO_3_13 = IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL), 452ab3a990bSBenoît Thébaudeau 453ab3a990bSBenoît Thébaudeau MX25_PAD_RTCK__RTCK = IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL), 454ab3a990bSBenoît Thébaudeau MX25_PAD_RTCK__OWIRE = IOMUX_PAD(0x3e4, 0x1ec, 0x11, 0, 0, NO_PAD_CTRL), 455ab3a990bSBenoît Thébaudeau MX25_PAD_RTCK__GPIO_3_14 = IOMUX_PAD(0x3e4, 0x1ec, 0x15, 0, 0, NO_PAD_CTRL), 456ab3a990bSBenoît Thébaudeau 457ab3a990bSBenoît Thébaudeau MX25_PAD_DE_B__DE_B = IOMUX_PAD(0x3ec, 0x1f0, 0x10, 0, 0, NO_PAD_CTRL), 458ab3a990bSBenoît Thébaudeau MX25_PAD_DE_B__GPIO_2_20 = IOMUX_PAD(0x3ec, 0x1f0, 0x15, 0, 0, NO_PAD_CTRL), 459ab3a990bSBenoît Thébaudeau 460ab3a990bSBenoît Thébaudeau MX25_PAD_TDO__TDO = IOMUX_PAD(0x3e8, 0x000, 0x00, 0, 0, NO_PAD_CTRL), 461ab3a990bSBenoît Thébaudeau 462ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_A__GPIO_A = IOMUX_PAD(0x3f0, 0x1f4, 0x10, 0, 0, NO_PAD_CTRL), 463ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_A__CAN1_TX = IOMUX_PAD(0x3f0, 0x1f4, 0x16, 0, 0, PAD_CTL_PUS_22K_UP), 464ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_A__USBOTG_PWR = IOMUX_PAD(0x3f0, 0x1f4, 0x12, 0, 0, PAD_CTL_PKE), 465ab3a990bSBenoît Thébaudeau 466ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_B__GPIO_B = IOMUX_PAD(0x3f4, 0x1f8, 0x10, 0, 0, NO_PAD_CTRL), 467ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_B__CAN1_RX = IOMUX_PAD(0x3f4, 0x1f8, 0x16, 0x480, 1, PAD_CTL_PUS_22K_UP), 468ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_B__USBOTG_OC = IOMUX_PAD(0x3f4, 0x1f8, 0x12, 0x57c, 1, PAD_CTL_PUS_100K_UP), 469ab3a990bSBenoît Thébaudeau 470ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_C__GPIO_C = IOMUX_PAD(0x3f8, 0x1fc, 0x10, 0, 0, NO_PAD_CTRL), 471ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_C__CAN2_TX = IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP), 472ab3a990bSBenoît Thébaudeau 473ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_D__GPIO_D = IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL), 474ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_E__LD16 = IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST), 475ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_D__CAN2_RX = IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP), 476ab3a990bSBenoît Thébaudeau 477ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_E__GPIO_E = IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL), 478ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_F__LD17 = IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST), 479ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_E__I2C3_CLK = IOMUX_PAD(0x400, 0x204, 0x11, 0x524, 2, NO_PAD_CTRL), 480ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_E__AUD7_TXD = IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL), 481ab3a990bSBenoît Thébaudeau 482ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_F__GPIO_F = IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL), 483ab3a990bSBenoît Thébaudeau MX25_PAD_GPIO_F__AUD7_TXC = IOMUX_PAD(0x404, 0x208, 0x14, 0, 0, NO_PAD_CTRL), 484ab3a990bSBenoît Thébaudeau 485ab3a990bSBenoît Thébaudeau MX25_PAD_EXT_ARMCLK__EXT_ARMCLK = IOMUX_PAD(0x000, 0x20c, 0x10, 0, 0, NO_PAD_CTRL), 486ab3a990bSBenoît Thébaudeau MX25_PAD_EXT_ARMCLK__GPIO_3_15 = IOMUX_PAD(0x000, 0x20c, 0x15, 0, 0, NO_PAD_CTRL), 487ab3a990bSBenoît Thébaudeau 488ab3a990bSBenoît Thébaudeau MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK = IOMUX_PAD(0x000, 0x210, 0x10, 0, 0, NO_PAD_CTRL), 489ab3a990bSBenoît Thébaudeau MX25_PAD_UPLL_BYPCLK__GPIO_3_16 = IOMUX_PAD(0x000, 0x210, 0x15, 0, 0, NO_PAD_CTRL), 490ab3a990bSBenoît Thébaudeau 491ab3a990bSBenoît Thébaudeau MX25_PAD_VSTBY_REQ__VSTBY_REQ = IOMUX_PAD(0x408, 0x214, 0x10, 0, 0, NO_PAD_CTRL), 492ab3a990bSBenoît Thébaudeau MX25_PAD_VSTBY_REQ__AUD7_TXFS = IOMUX_PAD(0x408, 0x214, 0x14, 0, 0, NO_PAD_CTRL), 493ab3a990bSBenoît Thébaudeau MX25_PAD_VSTBY_REQ__GPIO_3_17 = IOMUX_PAD(0x408, 0x214, 0x15, 0, 0, NO_PAD_CTRL), 494ab3a990bSBenoît Thébaudeau MX25_PAD_VSTBY_ACK__VSTBY_ACK = IOMUX_PAD(0x40c, 0x218, 0x10, 0, 0, NO_PAD_CTRL), 495ab3a990bSBenoît Thébaudeau MX25_PAD_VSTBY_ACK__GPIO_3_18 = IOMUX_PAD(0x40c, 0x218, 0x15, 0, 0, NO_PAD_CTRL), 496ab3a990bSBenoît Thébaudeau 497ab3a990bSBenoît Thébaudeau MX25_PAD_POWER_FAIL__POWER_FAIL = IOMUX_PAD(0x410, 0x21c, 0x10, 0, 0, NO_PAD_CTRL), 498ab3a990bSBenoît Thébaudeau MX25_PAD_POWER_FAIL__AUD7_RXD = IOMUX_PAD(0x410, 0x21c, 0x14, 0x478, 1, NO_PAD_CTRL), 499ab3a990bSBenoît Thébaudeau MX25_PAD_POWER_FAIL__GPIO_3_19 = IOMUX_PAD(0x410, 0x21c, 0x15, 0, 0, NO_PAD_CTRL), 500ab3a990bSBenoît Thébaudeau 501ab3a990bSBenoît Thébaudeau MX25_PAD_CLKO__CLKO = IOMUX_PAD(0x414, 0x220, 0x10, 0, 0, NO_PAD_CTRL), 502ab3a990bSBenoît Thébaudeau MX25_PAD_CLKO__GPIO_2_21 = IOMUX_PAD(0x414, 0x220, 0x15, 0, 0, NO_PAD_CTRL), 503ab3a990bSBenoît Thébaudeau 504ab3a990bSBenoît Thébaudeau MX25_PAD_BOOT_MODE0__BOOT_MODE0 = IOMUX_PAD(0x000, 0x224, 0x00, 0, 0, NO_PAD_CTRL), 505ab3a990bSBenoît Thébaudeau MX25_PAD_BOOT_MODE0__GPIO_4_30 = IOMUX_PAD(0x000, 0x224, 0x05, 0, 0, NO_PAD_CTRL), 506ab3a990bSBenoît Thébaudeau MX25_PAD_BOOT_MODE1__BOOT_MODE1 = IOMUX_PAD(0x000, 0x228, 0x00, 0, 0, NO_PAD_CTRL), 507ab3a990bSBenoît Thébaudeau MX25_PAD_BOOT_MODE1__GPIO_4_31 = IOMUX_PAD(0x000, 0x228, 0x05, 0, 0, NO_PAD_CTRL), 508ab3a990bSBenoît Thébaudeau 509ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_MISC = IOMUX_PAD(0x418, 0x000, 0, 0, 0, NO_PAD_CTRL), 510ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_FEC = IOMUX_PAD(0x41c, 0x000, 0, 0, 0, NO_PAD_CTRL), 511ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_JTAG = IOMUX_PAD(0x420, 0x000, 0, 0, 0, NO_PAD_CTRL), 512ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_NFC = IOMUX_PAD(0x424, 0x000, 0, 0, 0, NO_PAD_CTRL), 513ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_CSI = IOMUX_PAD(0x428, 0x000, 0, 0, 0, NO_PAD_CTRL), 514ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_WEIM = IOMUX_PAD(0x42c, 0x000, 0, 0, 0, NO_PAD_CTRL), 515ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_DDR = IOMUX_PAD(0x430, 0x000, 0, 0, 0, NO_PAD_CTRL), 516ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_CRM = IOMUX_PAD(0x434, 0x000, 0, 0, 0, NO_PAD_CTRL), 517ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_KPP = IOMUX_PAD(0x438, 0x000, 0, 0, 0, NO_PAD_CTRL), 518ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_SDHC1 = IOMUX_PAD(0x43c, 0x000, 0, 0, 0, NO_PAD_CTRL), 519ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_LCD = IOMUX_PAD(0x440, 0x000, 0, 0, 0, NO_PAD_CTRL), 520ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_UART = IOMUX_PAD(0x444, 0x000, 0, 0, 0, NO_PAD_CTRL), 521ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_NFC = IOMUX_PAD(0x448, 0x000, 0, 0, 0, NO_PAD_CTRL), 522ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_CSI = IOMUX_PAD(0x44c, 0x000, 0, 0, 0, NO_PAD_CTRL), 523ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DSE_CSPI1 = IOMUX_PAD(0x450, 0x000, 0, 0, 0, NO_PAD_CTRL), 524ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DDRTYPE = IOMUX_PAD(0x454, 0x000, 0, 0, 0, NO_PAD_CTRL), 525ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_SDHC1 = IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL), 526ab3a990bSBenoît Thébaudeau MX25_PAD_CTL_GRP_DVS_LCD = IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL), 527ab3a990bSBenoît Thébaudeau }; 528ab3a990bSBenoît Thébaudeau 529ab3a990bSBenoît Thébaudeau #endif /* __IOMUX_MX25_H__ */ 530