1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * Derived from drivers/spi/mpc8xxx_spi.c 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __KW_SPI_H__ 12 #define __KW_SPI_H__ 13 14 /* SPI Registers on kirkwood SOC */ 15 struct kwspi_registers { 16 u32 ctrl; /* 0x10600 */ 17 u32 cfg; /* 0x10604 */ 18 u32 dout; /* 0x10608 */ 19 u32 din; /* 0x1060c */ 20 u32 irq_cause; /* 0x10610 */ 21 u32 irq_mask; /* 0x10614 */ 22 u32 timing1; /* 0x10618 */ 23 u32 timing2; /* 0x1061c */ 24 u32 dw_cfg; /* 0x10620 - Direct Write Configuration */ 25 }; 26 27 /* They are used to define CONFIG_SYS_KW_SPI_MPP 28 * each of the below #defines selects which mpp is 29 * configured for each SPI signal in spi_claim_bus 30 * bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1) 31 * bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1) 32 * bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1) 33 */ 34 #define MOSI_MPP6 (1 << 0) 35 #define SCK_MPP10 (1 << 1) 36 #define MISO_MPP11 (1 << 2) 37 38 /* Control Register */ 39 #define KWSPI_CSN_ACT (1 << 0) /* Activates serial memory interface */ 40 #define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ 41 #define KWSPI_CS_SHIFT 2 /* chip select shift */ 42 #define KWSPI_CS_MASK 0x7 /* chip select mask */ 43 44 /* Configuration Register */ 45 #define KWSPI_CLKPRESCL_MASK 0x1f 46 #define KWSPI_CLKPRESCL_MIN 0x12 47 #define KWSPI_XFERLEN_1BYTE 0 48 #define KWSPI_XFERLEN_2BYTE (1 << 5) 49 #define KWSPI_XFERLEN_MASK (1 << 5) 50 #define KWSPI_ADRLEN_1BYTE 0 51 #define KWSPI_ADRLEN_2BYTE (1 << 8) 52 #define KWSPI_ADRLEN_3BYTE (2 << 8) 53 #define KWSPI_ADRLEN_4BYTE (3 << 8) 54 #define KWSPI_ADRLEN_MASK (3 << 8) 55 #define KWSPI_CPOL (1 << 11) 56 #define KWSPI_CPHA (1 << 12) 57 #define KWSPI_TXLSBF (1 << 13) 58 #define KWSPI_RXLSBF (1 << 14) 59 60 /* Timing Parameters 1 Register */ 61 #define KW_SPI_TMISO_SAMPLE_OFFSET 6 62 #define KW_SPI_TMISO_SAMPLE_MASK (0x3 << KW_SPI_TMISO_SAMPLE_OFFSET) 63 #define KW_SPI_TMISO_SAMPLE_1 (1 << KW_SPI_TMISO_SAMPLE_OFFSET) 64 #define KW_SPI_TMISO_SAMPLE_2 (2 << KW_SPI_TMISO_SAMPLE_OFFSET) 65 66 #define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ 67 #define KWSPI_IRQMASK 0 /* mask SPI interrupt */ 68 #define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ 69 70 #define KWSPI_TIMEOUT 10000 71 72 #endif /* __KW_SPI_H__ */ 73