1 /* 2 * Common definitions for LPC32XX board configurations 3 * 4 * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef _LPC32XX_CONFIG_H 10 #define _LPC32XX_CONFIG_H 11 12 /* Basic CPU architecture */ 13 #define CONFIG_ARCH_CPU_INIT 14 15 #define CONFIG_NR_DRAM_BANKS_MAX 2 16 17 /* UART configuration */ 18 #if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6) 19 #define CONFIG_SYS_NS16550_SERIAL 20 #define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) 21 #elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ 22 (CONFIG_SYS_LPC32XX_UART == 7) 23 #define CONFIG_LPC32XX_HSUART 24 #else 25 #error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7" 26 #endif 27 28 #if defined(CONFIG_SYS_NS16550_SERIAL) 29 #define CONFIG_SYS_NS16550 30 31 #define CONFIG_SYS_NS16550_REG_SIZE -4 32 #define CONFIG_SYS_NS16550_CLK get_serial_clock() 33 34 #define CONFIG_SYS_NS16550_COM1 UART3_BASE 35 #define CONFIG_SYS_NS16550_COM2 UART4_BASE 36 #define CONFIG_SYS_NS16550_COM3 UART5_BASE 37 #define CONFIG_SYS_NS16550_COM4 UART6_BASE 38 #endif 39 40 #if defined(CONFIG_LPC32XX_HSUART) 41 #if CONFIG_SYS_LPC32XX_UART == 1 42 #define HS_UART_BASE HS_UART1_BASE 43 #elif CONFIG_SYS_LPC32XX_UART == 2 44 #define HS_UART_BASE HS_UART2_BASE 45 #else /* CONFIG_SYS_LPC32XX_UART == 7 */ 46 #define HS_UART_BASE HS_UART7_BASE 47 #endif 48 #endif 49 50 #define CONFIG_SYS_BAUDRATE_TABLE \ 51 { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } 52 53 /* NOR Flash */ 54 #if defined(CONFIG_SYS_FLASH_CFI) 55 #define CONFIG_FLASH_CFI_DRIVER 56 #define CONFIG_SYS_FLASH_PROTECTION 57 #endif 58 59 #endif /* _LPC32XX_CONFIG_H */ 60