1 /* 2 * Common definitions for LPC32XX board configurations 3 * 4 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef _LPC32XX_CONFIG_H 10 #define _LPC32XX_CONFIG_H 11 12 #define CONFIG_SYS_GENERIC_BOARD 13 14 /* Basic CPU architecture */ 15 #define CONFIG_ARCH_CPU_INIT 16 17 #define CONFIG_NR_DRAM_BANKS_MAX 2 18 19 /* UART configuration */ 20 #if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6) 21 #define CONFIG_SYS_NS16550_SERIAL 22 #define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) 23 #elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ 24 (CONFIG_SYS_LPC32XX_UART == 7) 25 #define CONFIG_LPC32XX_HSUART 26 #else 27 #error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7" 28 #endif 29 30 #if defined(CONFIG_SYS_NS16550_SERIAL) 31 #define CONFIG_SYS_NS16550 32 33 #define CONFIG_SYS_NS16550_REG_SIZE -4 34 #define CONFIG_SYS_NS16550_CLK get_serial_clock() 35 36 #define CONFIG_SYS_NS16550_COM1 UART3_BASE 37 #define CONFIG_SYS_NS16550_COM2 UART4_BASE 38 #define CONFIG_SYS_NS16550_COM3 UART5_BASE 39 #define CONFIG_SYS_NS16550_COM4 UART6_BASE 40 #endif 41 42 #if defined(CONFIG_LPC32XX_HSUART) 43 #if CONFIG_SYS_LPC32XX_UART == 1 44 #define HS_UART_BASE HS_UART1_BASE 45 #elif CONFIG_SYS_LPC32XX_UART == 2 46 #define HS_UART_BASE HS_UART2_BASE 47 #else /* CONFIG_SYS_LPC32XX_UART == 7 */ 48 #define HS_UART_BASE HS_UART7_BASE 49 #endif 50 #endif 51 52 #define CONFIG_SYS_BAUDRATE_TABLE \ 53 { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } 54 55 /* Ethernet */ 56 #define LPC32XX_ETH_BASE ETHERNET_BASE 57 58 /* NOR Flash */ 59 #if defined(CONFIG_SYS_FLASH_CFI) 60 #define CONFIG_FLASH_CFI_DRIVER 61 #define CONFIG_SYS_FLASH_PROTECTION 62 #endif 63 64 #endif /* _LPC32XX_CONFIG_H */ 65