1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Common definitions for LPC32XX board configurations 4 * 5 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> 6 */ 7 8 #ifndef _LPC32XX_CONFIG_H 9 #define _LPC32XX_CONFIG_H 10 11 12 /* Basic CPU architecture */ 13 #define CONFIG_ARCH_CPU_INIT 14 15 /* UART configuration */ 16 #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ 17 (CONFIG_SYS_LPC32XX_UART == 7) 18 #if !defined(CONFIG_LPC32XX_HSUART) 19 #define CONFIG_LPC32XX_HSUART 20 #endif 21 #endif 22 23 #if !defined(CONFIG_SYS_NS16550_CLK) 24 #define CONFIG_SYS_NS16550_CLK 13000000 25 #endif 26 27 #define CONFIG_SYS_BAUDRATE_TABLE \ 28 { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } 29 30 /* Ethernet */ 31 #define LPC32XX_ETH_BASE ETHERNET_BASE 32 33 /* NAND */ 34 #if defined(CONFIG_NAND_LPC32XX_SLC) 35 #define NAND_LARGE_BLOCK_PAGE_SIZE 0x800 36 #define NAND_SMALL_BLOCK_PAGE_SIZE 0x200 37 38 #if !defined(CONFIG_SYS_NAND_PAGE_SIZE) 39 #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE 40 #endif 41 42 #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE) 43 #define CONFIG_SYS_NAND_OOBSIZE 64 44 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 45 48, 49, 50, 51, 52, 53, 54, 55, \ 46 56, 57, 58, 59, 60, 61, 62, 63, } 47 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 48 #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE) 49 #define CONFIG_SYS_NAND_OOBSIZE 16 50 #define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, } 51 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 52 #else 53 #error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value" 54 #endif 55 56 #define CONFIG_SYS_NAND_ECCSIZE 0x100 57 #define CONFIG_SYS_NAND_ECCBYTES 3 58 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 59 CONFIG_SYS_NAND_PAGE_SIZE) 60 #endif /* CONFIG_NAND_LPC32XX_SLC */ 61 62 /* NOR Flash */ 63 64 /* USB OHCI */ 65 #if defined(CONFIG_USB_OHCI_LPC32XX) 66 #define CONFIG_USB_OHCI_NEW 67 #define CONFIG_SYS_USB_OHCI_CPU_INIT 68 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 69 #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE 70 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci" 71 #endif 72 73 #endif /* _LPC32XX_CONFIG_H */ 74