1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018 NXP
4  */
5 
6 #ifndef __ASM_ARCH_IMX8_IOMUX_H__
7 #define __ASM_ARCH_IMX8_IOMUX_H__
8 
9 /*
10  * We use 64bits value for iomux settings.
11  * High 32bits are used for padring register value,
12  * low 16bits are used for pin index.
13  */
14 typedef u64 iomux_cfg_t;
15 
16 #define PADRING_IFMUX_EN_SHIFT		31
17 #define PADRING_IFMUX_EN_MASK		BIT(31)
18 #define PADRING_GP_EN_SHIFT		30
19 #define PADRING_GP_EN_MASK		BIT(30)
20 #define PADRING_IFMUX_SHIFT		27
21 #define PADRING_IFMUX_MASK		GENMASK(29, 27)
22 #define PADRING_CONFIG_SHIFT		25
23 #define PADRING_LPCONFIG_SHIFT		23
24 #define PADRING_PULL_SHIFT		5
25 #define PADRING_DSE_SHIFT		0
26 
27 #define MUX_PAD_CTRL_SHIFT	32
28 #define MUX_PAD_CTRL_MASK	((iomux_cfg_t)0xFFFFFFFF << MUX_PAD_CTRL_SHIFT)
29 #define MUX_PAD_CTRL(x)		((iomux_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
30 #define MUX_MODE_SHIFT		(PADRING_IFMUX_SHIFT + MUX_PAD_CTRL_SHIFT)
31 #define MUX_MODE_MASK		((iomux_cfg_t)0x7 << MUX_MODE_SHIFT)
32 #define PIN_ID_MASK		((iomux_cfg_t)0xFFFF)
33 
34 /* Valid mux alt0 to alt7 */
35 #define MUX_MODE_ALT(x)		(((iomux_cfg_t)(x) << MUX_MODE_SHIFT) & \
36 				 MUX_MODE_MASK)
37 
38 void imx8_iomux_setup_pad(iomux_cfg_t pad);
39 void imx8_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count);
40 #endif	/* __ASM_ARCH_IMX8_IOMUX_H__ */
41