1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2152f4898SPeter Griffin /* 3152f4898SPeter Griffin * Copyright (C) 2015 Linaro 4152f4898SPeter Griffin * Peter Griffin <peter.griffin@linaro.org> 5152f4898SPeter Griffin */ 6152f4898SPeter Griffin 7152f4898SPeter Griffin #ifndef _HI6220_GPIO_H_ 8152f4898SPeter Griffin #define _HI6220_GPIO_H_ 9152f4898SPeter Griffin 10152f4898SPeter Griffin #define HI6220_GPIO_BASE(bank) (((bank < 4) ? 0xf8011000 : \ 11152f4898SPeter Griffin 0xf7020000 - 0x4000) + (0x1000 * bank)) 12152f4898SPeter Griffin 13152f4898SPeter Griffin #define HI6220_GPIO_PER_BANK 8 14152f4898SPeter Griffin #define HI6220_GPIO_DIR 0x400 15152f4898SPeter Griffin 16152f4898SPeter Griffin struct gpio_bank { 17152f4898SPeter Griffin u8 *base; /* address of registers in physical memory */ 18152f4898SPeter Griffin }; 19152f4898SPeter Griffin 20152f4898SPeter Griffin /* Information about a GPIO bank */ 21152f4898SPeter Griffin struct hikey_gpio_platdata { 22152f4898SPeter Griffin int bank_index; 234e4ad6d1SPrabhakar Kushwaha ulong base; /* address of registers in physical memory */ 24152f4898SPeter Griffin }; 25152f4898SPeter Griffin 26152f4898SPeter Griffin #endif /* _HI6220_GPIO_H_ */ 27